Searched refs:AUIPC (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | RISCV.cpp | 50 AUIPC = 0x17, enumerator
209 write32le(buf + 0, utype(AUIPC, X_T2, hi20(offset))); in writePltHeader()
226 write32le(buf + 0, utype(AUIPC, X_T3, hi20(offset))); in writePlt()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 129 TmpInst = MCInstBuilder(RISCV::AUIPC).addReg(Ra).addExpr(CallExpr); in expandFunctionCall()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandPseudoInsts.cpp | 177 BuildMI(NewMBB, DL, TII->get(RISCV::AUIPC), DestReg) in expandAuipcInstPair()
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| H A D | RISCVInstrFormats.td | 130 def OPC_AUIPC : RISCVOpcode<"AUIPC", 0b0010111>;
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| H A D | RISCVInstrInfo.td | 272 let ParserMatchClass = UImmAsmOperand<20, "AUIPC">;
593 def AUIPC : RVInstU<OPC_AUIPC, (outs GPR:$rd), (ins uimm20_auipc:$imm20),
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | Mips32r6InstrInfo.td | 867 def AUIPC : R6MMR6Rel, AUIPC_ENC, AUIPC_DESC, ISA_MIPS32R6;
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| H A D | MipsScheduleGeneric.td | 60 AUIPC, BITSWAP, CLO_R6, CLZ_R6, LSA_R6,
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 2354 Out, MCInstBuilder(RISCV::AUIPC).addOperand(TmpReg).addExpr(SymbolHi)); in emitAuipcInstPair()
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