| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 113 ARMBaseInstrInfo::ARMBaseInstrInfo(const ARMSubtarget& STI) in ARMBaseInstrInfo() function in ARMBaseInstrInfo
162 ScheduleHazardRecognizer *ARMBaseInstrInfo::
548 bool ARMBaseInstrInfo::
599 bool ARMBaseInstrInfo::PredicateInstruction( in PredicateInstruction()
1112 void ARMBaseInstrInfo::
1368 void ARMBaseInstrInfo::
2104 bool ARMBaseInstrInfo::
2130 bool ARMBaseInstrInfo::
3005 bool ARMBaseInstrInfo::optimizeCompareInstr( in optimizeCompareInstr()
5413 bool ARMBaseInstrInfo::hasNOP() const { in hasNOP()
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| H A D | ThumbRegisterInfo.h | 23 class ARMBaseInstrInfo; variable
51 const ARMBaseInstrInfo &TII) const;
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| H A D | ARMBasicBlockInfo.h | 114 const ARMBaseInstrInfo *TII = nullptr;
120 static_cast<const ARMBaseInstrInfo*>(MF.getSubtarget().getInstrInfo()); in ARMBasicBlockUtils()
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| H A D | Thumb2InstrInfo.cpp | 49 : ARMBaseInstrInfo(STI) {} in Thumb2InstrInfo()
132 MachineInstr *RV = ARMBaseInstrInfo::optimizeSelect(MI, SeenMIs, PreferFalse); in optimizeSelect()
156 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc); in copyPhysReg()
203 ARMBaseInstrInfo::storeRegToStackSlot(MBB, I, SrcReg, isKill, FI, RC, TRI); in storeRegToStackSlot()
247 ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC, TRI); in loadRegFromStackSlot()
284 return ARMBaseInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
292 const ARMBaseInstrInfo &TII, in emitT2RegPlusImmediate()
532 const ARMBaseInstrInfo &TII, in rewriteT2FrameIndex()
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| H A D | ARMFixCortexA57AES1742098Pass.cpp | 108 void insertAESFixup(AESFixupLocation &FixupLoc, const ARMBaseInstrInfo *TII,
256 const ARMBaseInstrInfo *TII = STI.getInstrInfo(); in runOnMachineFunction()
398 AESFixupLocation &FixupLoc, const ARMBaseInstrInfo *TII, in insertAESFixup()
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| H A D | ARMSubtarget.cpp | 104 ? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this) in ARMSubtarget()
106 ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this) in ARMSubtarget()
107 : (ARMBaseInstrInfo *)new Thumb2InstrInfo(*this)), in ARMSubtarget()
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| H A D | ARMInstrInfo.h | 22 class ARMInstrInfo : public ARMBaseInstrInfo {
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| H A D | ARMBaseInstrInfo.h | 37 class ARMBaseInstrInfo : public ARMGenInstrInfo {
42 explicit ARMBaseInstrInfo(const ARMSubtarget &STI);
799 const ARMBaseInstrInfo &TII, unsigned MIFlags = 0);
806 const ARMBaseInstrInfo &TII, unsigned MIFlags = 0);
830 const ARMBaseInstrInfo &TII);
834 const ARMBaseInstrInfo &TII,
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| H A D | Thumb1InstrInfo.h | 22 class Thumb1InstrInfo : public ARMBaseInstrInfo {
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| H A D | ARMBlockPlacement.cpp | 32 const ARMBaseInstrInfo *TII;
221 TII = static_cast<const ARMBaseInstrInfo *>(ST.getInstrInfo()); in runOnMachineFunction()
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| H A D | ARMHazardRecognizer.cpp | 57 const ARMBaseInstrInfo &TII = *static_cast<const ARMBaseInstrInfo *>( in getHazardType()
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| H A D | Thumb2InstrInfo.h | 22 class Thumb2InstrInfo : public ARMBaseInstrInfo {
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| H A D | ARMSubtarget.h | 264 const ARMBaseInstrInfo *getInstrInfo() const override { in getInstrInfo()
290 std::unique_ptr<ARMBaseInstrInfo> InstrInfo;
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| H A D | ARMFrameLowering.cpp | 486 const ARMBaseInstrInfo &TII, unsigned MIFlags) { in insertSEHRange()
509 const DebugLoc &dl, const ARMBaseInstrInfo &TII, unsigned DestReg, in emitRegPlusImmediate()
522 const ARMBaseInstrInfo &TII, int NumBytes, in emitSPUpdate()
593 const ARMBaseInstrInfo &TII, bool HasFP) { in emitDefCFAOffsets()
715 const ARMBaseInstrInfo &TII = *STI.getInstrInfo(); in emitPrologue()
1251 const ARMBaseInstrInfo &TII = in emitEpilogue()
2047 const ARMBaseInstrInfo &TII) { in EstimateFunctionSizeInBytes()
2068 const ARMBaseInstrInfo &TII = in estimateRSStackSizeLimit()
2254 const ARMBaseInstrInfo &TII = in determineCalleeSaves()
2802 const ARMBaseInstrInfo &TII = in eliminateCallFramePseudoInstr()
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| H A D | ARMBaseRegisterInfo.cpp | 697 const ARMBaseInstrInfo &TII = in resolveFrameIndex()
698 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in resolveFrameIndex()
796 const ARMBaseInstrInfo &TII = in eliminateFrameIndex()
797 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in eliminateFrameIndex()
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| H A D | MLxExpansionPass.cpp | 50 const ARMBaseInstrInfo *TII;
374 TII = static_cast<const ARMBaseInstrInfo *>(Fn.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| H A D | CMakeLists.txt | 25 ARMBaseInstrInfo.cpp
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| H A D | ThumbRegisterInfo.cpp | 361 const ARMBaseInstrInfo &TII) const { in rewriteFrameIndex()
448 const ARMBaseInstrInfo &TII = *STI.getInstrInfo(); in resolveFrameIndex()
473 const ARMBaseInstrInfo &TII = *STI.getInstrInfo(); in eliminateFrameIndex()
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| H A D | ARMInstrInfo.cpp | 31 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) : ARMBaseInstrInfo(STI) {} in ARMInstrInfo()
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| H A D | ARMSchedule.td | 146 const ARMBaseInstrInfo *TII =
147 static_cast<const ARMBaseInstrInfo*>(SchedModel->getInstrInfo());
162 "ARMBaseInstrInfo::isCPSRDefined"
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| H A D | Thumb1InstrInfo.cpp | 24 : ARMBaseInstrInfo(STI) {} in Thumb1InstrInfo()
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| /llvm-project-15.0.7/llvm/unittests/Target/ARM/ |
| H A D | InstSizes.cpp | 20 LLVMTargetMachine *TM, const ARMBaseInstrInfo *II, in runChecks()
23 std::function<void(const ARMBaseInstrInfo &, MachineFunction &, unsigned &)> in runChecks() argument
90 const ARMBaseInstrInfo *II = ST.getInstrInfo(); in TEST()
92 auto cmpInstSize = [](const ARMBaseInstrInfo &II, MachineFunction &MF, in TEST()
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| H A D | MachineInstrTest.cpp | 93 const ARMBaseInstrInfo *TII = ST.getInstrInfo(); in TEST()
250 const ARMBaseInstrInfo *TII = ST.getInstrInfo(); in TEST()
350 const ARMBaseInstrInfo *TII = ST.getInstrInfo(); in TEST()
1204 const ARMBaseInstrInfo *TII = ST.getInstrInfo(); in TEST()
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | indirectbr-3.ll | 4 ; If ARMBaseInstrInfo::AnalyzeBlocks returns the wrong value, which was possible
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| /llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/ARM/ |
| H A D | BUILD.gn | 68 "ARMBaseInstrInfo.cpp",
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