| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | loh.mir | 34 $x0 = ADRP target-flags(aarch64-page) @g0 35 $x0 = ADRP target-flags(aarch64-page) @g1 36 $x1 = ADRP target-flags(aarch64-page) @g2 37 $x1 = ADRP target-flags(aarch64-page) @g3 38 $x1 = ADRP target-flags(aarch64-page) @g4 47 $x1 = ADRP target-flags(aarch64-page) @g0 50 $x20 = ADRP target-flags(aarch64-page) @g0 56 $x9 = ADRP target-flags(aarch64-page) @g0 82 $x4 = ADRP target-flags(aarch64-page) @g2 84 $x5 = ADRP target-flags(aarch64-page) @g2 [all …]
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| H A D | machine-outliner-bad-adrp.mir | 27 renamable $x14 = ADRP target-flags(aarch64-page) %const.0 28 renamable $x15 = ADRP target-flags(aarch64-page) %const.0 29 renamable $x16 = ADRP target-flags(aarch64-page) %const.0 33 renamable $x14 = ADRP target-flags(aarch64-page) %const.0 34 renamable $x15 = ADRP target-flags(aarch64-page) %const.0 35 renamable $x16 = ADRP target-flags(aarch64-page) %const.0 39 renamable $x14 = ADRP target-flags(aarch64-page) %const.0 40 renamable $x15 = ADRP target-flags(aarch64-page) %const.0 41 renamable $x16 = ADRP target-flags(aarch64-page) %const.0
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| H A D | machine-outliner-inline-asm-adrp.mir | 30 $x27 = ADRP target-flags(aarch64-page, aarch64-got) @g 31 $lr = ADRP target-flags(aarch64-page, aarch64-got) @g 42 $x27 = ADRP target-flags(aarch64-page, aarch64-got) @g 43 $lr = ADRP target-flags(aarch64-page, aarch64-got) @g 54 $x27 = ADRP target-flags(aarch64-page, aarch64-got) @g 55 $lr = ADRP target-flags(aarch64-page, aarch64-got) @g
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| H A D | a55-fuse-address.mir | 32 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @a 33 …; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @a … 34 ; CHECK: [[ADRP1:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @b 39 %1:gpr64common = ADRP target-flags(aarch64-page) @a 40 %4:gpr64common = ADRP target-flags(aarch64-page) @b
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| H A D | jti-correct-datatype.mir | 38 $x8 = ADRP target-flags(aarch64-page) %jump-table.0 48 renamable $x8 = ADRP target-flags(aarch64-page) @reps 57 renamable $x8 = ADRP target-flags(aarch64-page) @reps 66 renamable $x8 = ADRP target-flags(aarch64-page) @reps 75 renamable $x8 = ADRP target-flags(aarch64-page) @reps
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| H A D | loop-sink-limit.mir | 101 ; SINK1: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A 102 …; SINK1: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch6… 128 ; SINK2: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A 129 …; SINK2: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch6… 157 %8:gpr64common = ADRP target-flags(aarch64-page) @A
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| H A D | speculation-hardening-sls.mir | 59 $x8 = ADRP target-flags(aarch64-page) @ptr_aa 84 $x8 = ADRP target-flags(aarch64-page) @ptr_aaz 109 $x8 = ADRP target-flags(aarch64-page) @ptr_ab 134 $x8 = ADRP target-flags(aarch64-page) @ptr_abz
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| H A D | machine-outliner.mir | 51 renamable $x9 = ADRP target-flags(aarch64-page) @bar 65 renamable $x9 = ADRP target-flags(aarch64-page) @x 78 renamable $x9 = ADRP target-flags(aarch64-page) @x 91 renamable $x9 = ADRP target-flags(aarch64-page) @x
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/ |
| H A D | select-const-vector.mir | 21 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 22 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c… 50 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 51 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c… 79 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 80 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c… 108 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 109 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c… 138 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 139 …; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co…
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| H A D | legalize-global.mir | 22 ; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var 23 …; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64… 38 ; When we legalize into ADRP + G_ADD_LOW, both should inherit the offset 42 ; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var + 1 43 …; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64…
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| H A D | select-imm.mir | 73 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 74 …; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co… 98 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 99 …; CHECK: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co… 123 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 124 …; CHECK: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co…
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| H A D | select-shuffle-vector.mir | 49 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 50 …; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co… 87 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 88 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c… 118 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 119 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c… 149 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 150 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c…
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| H A D | legalize-fp128-fconstant.mir | 14 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 15 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c…
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| H A D | select-const-pool.mir | 20 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 21 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c…
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| H A D | select-fp16-fconstant.mir | 42 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 43 …; CHECK: [[LDRHui:%[0-9]+]]:fpr16 = LDRHui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co…
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| H A D | legalize-blockaddress.mir | 29 ; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @addr 30 …; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch…
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| H A D | select-shufflevec-undef-mask-elt.mir | 27 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 28 …; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co…
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| H A D | sext-inreg-ldrow-16b.mir | 66 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @x 67 …; CHECK: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[ADRP]], target-flags(aarch64-pageoff, aarch64-n… 79 %15:gpr64(p0) = ADRP target-flags(aarch64-page) @x
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| H A D | select-dup.mir | 392 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 393 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c… 412 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 413 …; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %co… 432 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0 433 …; CHECK: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %c…
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| H A D | localizer.mir | 419 ; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var1 420 …; CHECK: %addlow1:gpr(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @v… 422 ; CHECK: [[ADRP1:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var2 425 ; CHECK: [[ADRP2:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var3 428 ; CHECK: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[ADRP]](p0) :: (load (s32) from @var1) 436 ; CHECK: [[ADRP3:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var2 441 ; CHECK: [[ADRP4:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var1 444 ; CHECK: [[ADRP5:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var3 455 %1:gpr64(p0) = ADRP target-flags(aarch64-page) @var1 459 %5:gpr64(p0) = ADRP target-flags(aarch64-page) @var2 [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/MIR/AArch64/ |
| H A D | target-flags.mir | 24 ; CHECK: $x8 = ADRP target-flags(aarch64-page) @var_i32 25 ; CHECK-NEXT: $x9 = ADRP target-flags(aarch64-page) @var_i64 30 $x8 = ADRP target-flags(aarch64-page) @var_i32 31 $x9 = ADRP target-flags(aarch64-page) @var_i64
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| H A D | mir-canon-constant-pool-hash.mir | 19 %vreg0:gpr64common = ADRP target-flags(aarch64-page) %const.0 20 %vreg1:gpr64common = ADRP target-flags(aarch64-page) %const.1
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| H A D | stack-object-local-offset.mir | 36 %0 = ADRP @var 39 %2 = ADRP @local_addr
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| /llvm-project-15.0.7/compiler-rt/lib/xray/ |
| H A D | xray_trampoline_AArch64.S | 35 ADRP X1, _ZN6__xray19XRayPatchedFunctionE 88 ADRP X1, _ZN6__xray19XRayPatchedFunctionE 137 ADRP X1, _ZN6__xray19XRayPatchedFunctionE
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| /llvm-project-15.0.7/lld/test/ELF/ |
| H A D | aarch64-adrp-add.s | 24 ## ADRP and ADD use different registers, no relaxations should be applied. 28 ## ADRP and ADD use different registers, no relaxations should be applied. 42 ## ADRP and ADD use different registers, no relaxations should be applied. 46 ## ADRP and ADD use different registers, no relaxations should be applied.
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