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Searched refs:xe_mmio (Results 1 – 25 of 26) sorted by relevance

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/linux-6.15/drivers/gpu/drm/xe/
H A Dxe_mmio.h17 void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size);
19 u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);
20 u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);
21 void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);
22 u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);
23 u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);
27 u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
28 int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
30 int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,
33 static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr) in xe_mmio_adjusted_addr()
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H A Dxe_mmio.c69 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in mmio_multi_tile_setup()
160 static void mmio_flush_pending_writes(struct xe_mmio *mmio) in mmio_flush_pending_writes()
173 u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read8()
187 u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read16()
201 void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val) in xe_mmio_write32()
213 u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read32()
231 u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set) in xe_mmio_rmw32()
242 int xe_mmio_write32_and_verify(struct xe_mmio *mmio, in xe_mmio_write32_and_verify()
253 bool xe_mmio_in_range(const struct xe_mmio *mmio, in xe_mmio_in_range()
284 u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read64_2x32()
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H A Dxe_irq.c61 struct xe_mmio *mmio = &tile->mmio; in unmask_and_enable()
79 struct xe_mmio *mmio = &tile->mmio; in mask_and_disable()
96 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in xelp_intr_disable()
112 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in gu_misc_irq_ack()
127 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in xelp_intr_enable()
138 struct xe_mmio *mmio = &gt->mmio; in xe_irq_enable_hwe()
226 struct xe_mmio *mmio, in gt_engine_identity()
310 struct xe_mmio *mmio = &tile->mmio; in gt_irq_handler()
448 struct xe_mmio *mmio = &tile->mmio; in dg1_irq_handler()
491 struct xe_mmio *mmio = &tile->mmio; in gt_irq_reset()
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H A Dxe_hwmon.c168 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in xe_hwmon_power_max_read()
209 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_power_max_write()
241 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_power_rated_max_read()
278 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_energy_get()
301 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_power_max_interval_show()
342 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_power_max_interval_store()
519 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_get_voltage()
542 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_temp_read()
844 struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe); in xe_hwmon_get_preregistration_info()
H A Dxe_survivability_mode.c52 static void set_survivability_info(struct xe_mmio *mmio, struct xe_survivability_info *info, in set_survivability_info()
64 struct xe_mmio *mmio; in populate_survivability_info()
201 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in survivability_mode_requested()
H A Dxe_device_types.h135 struct xe_mmio { struct
207 struct xe_mmio mmio;
H A Dxe_gt_types.h153 struct xe_mmio mmio;
H A Dxe_gt_mcr.c253 struct xe_mmio *mmio = &gt->mmio; in init_steering_l3bank()
641 struct xe_mmio *mmio = &gt->mmio; in rw_with_mcr_steering()
H A Dxe_guc.c779 struct xe_mmio *mmio = &gt->mmio; in xe_guc_reset()
814 struct xe_mmio *mmio = &gt->mmio; in guc_prepare_xfer()
949 struct xe_mmio *mmio = &gt->mmio; in guc_wait_ucode()
1282 struct xe_mmio *mmio = &gt->mmio; in xe_guc_mmio_send_recv()
H A Dxe_pcode.c61 struct xe_mmio *mmio = &tile->mmio; in __pcode_mailbox_rw()
H A Dxe_gt_topology.c132 struct xe_mmio *mmio = &gt->mmio; in load_l3_bank_mask()
H A Dxe_ttm_stolen_mgr.c86 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in detect_bar2_dgfx()
H A Dxe_gt_idle.c104 struct xe_mmio *mmio = &gt->mmio; in xe_gt_idle_enable_pg()
H A Dxe_gt_tlb_invalidation.c304 struct xe_mmio *mmio = &gt->mmio; in xe_gt_tlb_invalidation_ggtt()
H A Dxe_execlist.c48 struct xe_mmio *mmio = &gt->mmio; in __start_lrc()
H A DMakefile80 xe_mmio.o \
H A Dxe_gsc.c615 struct xe_mmio *mmio = &gt->mmio; in xe_gsc_print_info()
H A Dxe_trace.h351 TP_PROTO(struct xe_mmio *mmio, bool write, u32 reg, u64 val, int len),
H A Dxe_oa.c402 struct xe_mmio *mmio = &stream->gt->mmio; in xe_oa_init_oa_buffer()
486 struct xe_mmio *mmio = &stream->gt->mmio; in xe_oa_disable()
815 struct xe_mmio *mmio = &stream->gt->mmio; in xe_oa_disable_metric_set()
1063 struct xe_mmio *mmio = &stream->gt->mmio; in xe_oa_enable_metric_set()
H A Dxe_ggtt.c114 struct xe_mmio *mmio = &affected_gt->mmio; in ggtt_update_access_counter()
H A Dxe_query.c94 struct xe_mmio *mmio = &hwe->gt->mmio; in hwe_read_timestamp()
H A Dxe_pci.c451 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in read_gmdid()
H A Dxe_wa.c983 struct xe_mmio *mmio = &tile->mmio; in xe_wa_apply_tile_workarounds()
H A Dxe_device.c527 struct xe_mmio *mmio = xe_root_tile_mmio(xe); in __xe_driver_flr()
/linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/
H A Dintel_uncore.h20 static inline struct xe_mmio *__compat_uncore_to_mmio(struct intel_uncore *uncore) in __compat_uncore_to_mmio()

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