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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6 |
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| #
6fd979c2 |
| 06-Mar-2025 |
Matthew Brost <[email protected]> |
drm/xe: Add SVM init / close / fini to faulting VMs
Add SVM init / close / fini to faulting VMs. Minimual implementation acting as a placeholder for follow on patches.
v2: - Add close function v3:
drm/xe: Add SVM init / close / fini to faulting VMs
Add SVM init / close / fini to faulting VMs. Minimual implementation acting as a placeholder for follow on patches.
v2: - Add close function v3: - Better commit message (Thomas) - Kernel doc (Thomas) - Update chunk array to be unsigned long (Thomas) - Use new drm_gpusvm.h header location (Thomas) - Newlines between functions in xe_svm.h (Thomas) - Call drm_gpusvm_driver_set_lock in init (Thomas) v6: - Only compile if CONFIG_DRM_GPUSVM selected (CI, Lucas) v7: - Only select CONFIG_DRM_GPUSVM if DEVICE_PRIVATE (CI)
Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: Himal Prasad Ghimiray <[email protected]> Reviewed-by: Thomas Hellström <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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00c8efc3 |
| 05-Mar-2025 |
Thomas Hellström <[email protected]> |
drm/xe: Add a shrinker for xe bos
Rather than relying on the TTM watermark accounting add a shrinker for xe_bos in TT or system memory.
Leverage the newly added TTM per-page shrinking and shmem bac
drm/xe: Add a shrinker for xe bos
Rather than relying on the TTM watermark accounting add a shrinker for xe_bos in TT or system memory.
Leverage the newly added TTM per-page shrinking and shmem backup support.
Although xe doesn't fully support WONTNEED (purgeable) bos yet, introduce and add shrinker support for purgeable ttm_tts.
v2: - Cleanups bugfixes and a KUNIT shrinker test. - Add writeback support, and activate if kswapd. v3: - Move the try_shrink() helper to core TTM. - Minor cleanups. v4: - Add runtime pm for the shrinker. Shrinking may require an active device for CCS metadata copying. v5: - Separately purge ghost- and zombie objects in the shrinker. - Fix a format specifier - type inconsistency. (Kernel test robot). v7: - s/long/s64/ (Christian König) - s/sofar/progress/ (Matt Brost) v8: - Rebase on Xe KUNIT update. - Add content verifying to the shrinker kunit test. - Split out TTM changes to a separate patch. - Get rid of multiple bool arguments for clarity (Matt Brost) - Avoid an error pointer dereference (Matt Brost) - Avoid an integer overflow (Matt Auld) - Address misc review comments by Matt Brost. v9: - Fix a compliation error. - Rebase. v10: - Update to new LRU walk interface. - Rework ghost-, zombie and purged object shrinking. - Rebase. v11: - Use additional TTM helpers. - Honor __GFP_FS and __GFP_IO - Rebase. v13: - Use ttm_tt_setup_backup(). v14: - Don't set up backup on imported bos. v15: - Rebase on backup interface changes.
Cc: Christian König <[email protected]> Cc: Somalapuram Amaranath <[email protected]> Cc: Matthew Brost <[email protected]> Cc: <[email protected]> Signed-off-by: Thomas Hellström <[email protected]> Reviewed-by: Matthew Brost <[email protected]> Acked-by: Christian König <[email protected]> Link: https://lore.kernel.org/intel-xe/[email protected]
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Revision tags: v6.14-rc5 |
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1537ec85 |
| 26-Feb-2025 |
Harish Chegondi <[email protected]> |
drm/xe/uapi: Introduce API for EU stall sampling
A new hardware feature first introduced in PVC gives capability to periodically sample EU stall state and record counts for different stall reasons,
drm/xe/uapi: Introduce API for EU stall sampling
A new hardware feature first introduced in PVC gives capability to periodically sample EU stall state and record counts for different stall reasons, on a per IP basis, aggregate across all EUs in a subslice and record the samples in a buffer in each subslice. Eventually, the aggregated data is written out to a buffer in the memory. This feature is also supported in XE2 and later architecture GPUs.
Use an existing IOCTL - DRM_IOCTL_XE_OBSERVATION as the interface into the driver from the user space to do initial setup and obtain a file descriptor for the EU stall data stream. Input parameter to the IOCTL is a struct drm_xe_observation_param in which observation_type should be set to DRM_XE_OBSERVATION_TYPE_EU_STALL, observation_op should be DRM_XE_OBSERVATION_OP_STREAM_OPEN and param should point to a chain of drm_xe_ext_set_property structures in which each structure has a pair of property and value. The EU stall sampling input properties are defined in drm_xe_eu_stall_property_id enum.
With the file descriptor obtained from DRM_IOCTL_XE_OBSERVATION, user space can enable and disable EU stall sampling with the IOCTLs: DRM_XE_OBSERVATION_IOCTL_ENABLE and DRM_XE_OBSERVATION_IOCTL_DISABLE. User space can also call poll() to check for availability of data in the buffer. The data can be read with read(). Finally, the file descriptor can be closed with close().
v11: Changed a couple of variables in struct eu_stall_open_properties from unsigned int to int. v10: Use extension number while parsing chain of extensions. Remove function description for static functions. Move code around as per review feedback. v9: Changed some u32 to unsigned int. Moved some code around as per review feedback from v8. v8: Used div_u64 instead of / to fix 32-bit build issue. Changed copyright year in xe_eu_stall.c/h to 2025. v7: Renamed input property DRM_XE_EU_STALL_PROP_EVENT_REPORT_COUNT to DRM_XE_EU_STALL_PROP_WAIT_NUM_REPORTS to be consistent with OA. Renamed the corresponding internal variables. Fixed some commit messages based on review feedback. v6: Change the input sampling rate to GPU cycles instead of GPU cycles multiplier.
Reviewed-by: Ashutosh Dixit <[email protected]> Signed-off-by: Harish Chegondi <[email protected]> Signed-off-by: Ashutosh Dixit <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/bb707a27975c33e4a912b9839b023acb7a1f9c90.1740533885.git.harish.chegondi@intel.com
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b729ea27 |
| 24-Feb-2025 |
Riana Tauro <[email protected]> |
drm/xe: Add engine activity support
GuC provides support to read engine counters to calculate the engine activity. KMD exposes two counters via the PMU interface to calculate engine activity
Engine
drm/xe: Add engine activity support
GuC provides support to read engine counters to calculate the engine activity. KMD exposes two counters via the PMU interface to calculate engine activity
Engine Active Ticks(engine-active-ticks) - active ticks of engine Engine Total Ticks (engine-total-ticks) - total ticks of engine
Engine activity percentage can be calculated as below Engine activity % = (engine active ticks/engine total ticks) * 100.
v2: fix cosmetic review comments add forcewake for gpm_ts (Umesh)
v3: fix CI hooks error change function parameters and unpin bo on error of allocate_activity_buffers fix kernel-doc (Umesh) use engine activity (Umesh, Lucas) rename xe_engine_activity to xe_guc_engine_* fix commit message to use engine activity (Lucas, Umesh)
v4: add forcewake in PMU layer
v5: fix makefile use drmm_kcalloc instead of kmalloc_array remove managed bo skip init for VF fix cosmetic review comments (Michal)
Signed-off-by: Riana Tauro <[email protected]> Reviewed-by: Umesh Nerlige Ramappa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Lucas De Marchi <[email protected]>
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Revision tags: v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1 |
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385a8015 |
| 29-Jan-2025 |
Daniele Ceraolo Spurio <[email protected]> |
drm/xe/pxp: Add PXP debugfs support
This patch introduces 2 PXP debugfs entries:
- info: prints the current PXP status and key instance - terminate: simulate a termination interrupt
The first one
drm/xe/pxp: Add PXP debugfs support
This patch introduces 2 PXP debugfs entries:
- info: prints the current PXP status and key instance - terminate: simulate a termination interrupt
The first one is useful for debug, while the second one can be used for testing the termination flow.
v2: move the info prints inside the lock (John)
Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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dcdd6b84 |
| 29-Jan-2025 |
Daniele Ceraolo Spurio <[email protected]> |
drm/xe/pxp: Allocate PXP execution resources
PXP requires submissions to the HW for the following operations
1) Key invalidation, done via the VCS engine 2) Communication with the GSC FW for sessio
drm/xe/pxp: Allocate PXP execution resources
PXP requires submissions to the HW for the following operations
1) Key invalidation, done via the VCS engine 2) Communication with the GSC FW for session management, done via the GSCCS.
Key invalidation submissions are serialized (only 1 termination can be serviced at a given time) and done via GGTT, so we can allocate a simple BO and a kernel queue for it.
Submissions for session management are tied to a PXP client (identified by a unique host_session_id); from the GSC POV this is a user-accessible construct, so all related submission must be done via PPGTT. The driver does not currently support PPGTT submission from within the kernel, so to add this support, the following changes have been included:
- a new type of kernel-owned VM (marked as GSC), required to ensure we don't use fault mode on the engine and to mark the different lock usage with lockdep. - a new function to map a BO into a VM from within the kernel.
v2: improve comments and function name, remove unneeded include (John) v3: fix variable/function names in documentation
Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Matthew Brost <[email protected]> Cc: Thomas Hellström <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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ff48e05d |
| 29-Jan-2025 |
Daniele Ceraolo Spurio <[email protected]> |
drm/xe/pxp: Initialize PXP structure and KCR reg
As the first step towards adding PXP support, hook in the PXP init function, allocate the PXP structure and initialize the KCR register to allow PXP
drm/xe/pxp: Initialize PXP structure and KCR reg
As the first step towards adding PXP support, hook in the PXP init function, allocate the PXP structure and initialize the KCR register to allow PXP HWDRM sessions.
v2: remove unneeded includes, free PXP memory on error (John)
Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.13 |
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c13a42f2 |
| 15-Jan-2025 |
Gustavo Sousa <[email protected]> |
drm/xe: Fix sort order of .o lists in Makefile
The Makefile for xe asks us to keep the lists of object files sorted:
# Please keep these build lists sorted!
Reshuffle the lists into the correct
drm/xe: Fix sort order of .o lists in Makefile
The Makefile for xe asks us to keep the lists of object files sorted:
# Please keep these build lists sorted!
Reshuffle the lists into the correct sort order. That was done by filtering each unsorted list through 'LC_ALL=C sort'.
Signed-off-by: Gustavo Sousa <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Matt Roper <[email protected]>
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5e940312 |
| 28-Jan-2025 |
Riana Tauro <[email protected]> |
drm/xe: Add functions and sysfs for boot survivability
Boot Survivability is a software based workflow for recovering a system in a failed boot state. Here system recoverability is concerned with re
drm/xe: Add functions and sysfs for boot survivability
Boot Survivability is a software based workflow for recovering a system in a failed boot state. Here system recoverability is concerned with recovering the firmware responsible for boot.
This is implemented by loading the driver with bare minimum (no drm card) to allow the firmware to be flashed through mei-gsc and collect telemetry. The driver's probe flow is modified such that it enters survivability mode when pcode initialization is incomplete and boot status denotes a failure. In this mode, drm card is not exposed and presence of survivability_mode entry in PCI sysfs is used to indicate survivability mode and provide additional information required for debug
This patch adds initialization functions and exposes admin readable sysfs entries
The new sysfs will have the below layout
/sys/bus/.../bdf ├── survivability_mode
v2: reorder headers fix doc remove survivability info and use mode to display information use separate function for logging survivability information for critical error (Rodrigo)
v3: use for loop use dev logs instead of drm use helper function for aux history(Rodrigo) remove unnecessary error check of greater than max_scratch as we are reading only 3 bit
v4: fix checkpatch warnings fix space (Rodrigo) rename register
Signed-off-by: Riana Tauro <[email protected]> Acked-by: Ashwin Kumar Kulkarni <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
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f14d81b7 |
| 24-Jan-2025 |
Gustavo Sousa <[email protected]> |
drm/i915/cmtg: Disable the CMTG
The CMTG is a timing generator that runs in parallel with transcoders timing generators and can be used as a reference for synchronization.
We have observed that we
drm/i915/cmtg: Disable the CMTG
The CMTG is a timing generator that runs in parallel with transcoders timing generators and can be used as a reference for synchronization.
We have observed that we are inheriting from GOP a display configuration with the CMTG enabled. Because our driver doesn't currently implement any CMTG sequences, the CMTG ends up still enabled after our driver takes over.
We need to make sure that the CMTG is not enabled if we are not going to use it. For that, let's add a partial implementation in our driver that only cares about disabling the CMTG if it was found enabled during initial hardware readout. In the future, we can also implement sequences for using the CMTG if that becomes a needed feature.
For now, we only deal with cases when it is possible to disable the CMTG without requiring a modeset. For earlier display versions, we simply skip if we find the CMTG enabled and we can't disable it without a proper modeset. In the future, we need to properly handle that case.
v2: - DG2 does not have the CMTG. Update HAS_CMTG() accordingly. - Update logic to force disabling of CMTG only for initial commit. v3: - Add missing changes for v2 that were staged but not committed. v4: - Avoid if/else duplication in intel_cmtg_dump_state() by using "n/a" for CMTG B enabled/disabled string for platforms without it. (Jani) - Prefer intel_cmtg_readout_hw_state() over intel_cmtg_readout_state(). (Jani) - Use display struct instead of i915 as first parameter for TRANS_DDI_FUNC_CTL2(). (Jani) - Fewer continuation lines in variable declaration/initialization for better readability. (Jani) - Coding style improvements. (Jani) - Use drm_dbg_kms() instead of drm_info() for logging the disabling of the CMTG. - Make struct intel_cmtg_state entirely private to intel_cmtg.c. v5: - Do the disable sequence as part of the sanitization step after hardware readout instead of initial modeset commit. (Jani) - Adapt to commit 15133582465f ("drm/i915/display: convert global state to struct intel_display") by using a display struct instead of i915 as argument for intel_atomic_global_obj_init(). v6: - Do not track CMTG state as a global state. (Ville) - Simplify the driver logic by only disabling the CMTG only on cases when a modeset is not required. (Ville) v7: - Remove the call to drm_WARN_ON() when checking intel_cmtg_disable_requires_modeset() and use a FIXME in the comment instead. - Remove the !HAS_CMTG() guard from intel_cmtg_get_config(), which is static and its caller is already protected by that same condition. - Also take the opportunity to put some Bspec references in the commit trailers section. v8: - Use HAS_TRANSCODER() instead of intel_crtc_for_pipe(). (Ville) - Ensure transcoder power well is enabled before reading TRANS_DDI_FUNC_CTL2. (Ville)
Bspec: 68915, 49262 Cc: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Gustavo Sousa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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011c1e24 |
| 24-Jan-2025 |
Vinay Belgaumkar <[email protected]> |
drm/xe/pmu: Enable PMU interface
Basic PMU enabling patch. Setup the basic framework for adding events.
Based on previous versions by Bommu Krishnaiah, Aravind Iddamsetty and Riana Tauro, using i91
drm/xe/pmu: Enable PMU interface
Basic PMU enabling patch. Setup the basic framework for adding events.
Based on previous versions by Bommu Krishnaiah, Aravind Iddamsetty and Riana Tauro, using i915 and rapl as reference implementations.
Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Vinay Belgaumkar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Lucas De Marchi <[email protected]>
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59476420 |
| 20-Jan-2025 |
Ankit Nautiyal <[email protected]> |
drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
Add helpers to calculate the necessary parameters for configuring the HDMI PLL for SNPS MPLLB and C10 PHY.
The pll parameters a
drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
Add helpers to calculate the necessary parameters for configuring the HDMI PLL for SNPS MPLLB and C10 PHY.
The pll parameters are computed for desired pixel clock, curve data and other inputs used for interpolation and finally stored in the pll_state.
Currently the helper is used to compute PLLs for DG2 SNPS PHY. Support for computing Plls for C10 PHY is added in subsequent patches.
v2: -Used kernel types instead of C99 types. (Jani) -Fixed styling issues and renamed few variables to more meaningful names. (Jani) -Added Xe make file changes. (Jani) -Fixed build errors reported by kernel test robot
v3: -Renamed helper to align with file name. (Jani)
v4: -Removed erroraneous comment, and added Bspec# as part of trailer. (Suraj) -Fixed warning flagged by kernel test robot.
Bspec: 54032 Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Khaled Almahallawy <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4 |
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696bfdf2 |
| 20-Dec-2024 |
Michal Wajdeczko <[email protected]> |
drm/xe/guc: Introduce the GuC Buffer Cache
The purpose of the GuC Buffer Cache is to maintain a set ofreusable buffers that could be used while sending some of the CTB H2G actions that require separ
drm/xe/guc: Introduce the GuC Buffer Cache
The purpose of the GuC Buffer Cache is to maintain a set ofreusable buffers that could be used while sending some of the CTB H2G actions that require separate buffer with indirect data. Currently only few PF actions need this so initialize it only when running as a PF.
Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Matthew Brost <[email protected]> Cc: Rodrigo Vivi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Reviewed-by: Matthew Brost <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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73900dce |
| 14-Jan-2025 |
Imre Deak <[email protected]> |
drm/xe/dp: Enable DP tunneling
Enable the DP tunneling functionality in the xe driver.
v2: Keep using IS_ENABLED() for kconfig options. (Jani)
Cc: Jani Nikula <[email protected]> Reviewed-by:
drm/xe/dp: Enable DP tunneling
Enable the DP tunneling functionality in the xe driver.
v2: Keep using IS_ENABLED() for kconfig options. (Jani)
Cc: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.13-rc3, v6.13-rc2, v6.13-rc1 |
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adceb416 |
| 20-Nov-2024 |
Jani Nikula <[email protected]> |
drm/i915/display: add intel_display_conversion.c to hide stuff better
The __to_intel_display() generics require the definition of struct drm_i915_private i.e. inclusion of i915_drv.h. Add intel_disp
drm/i915/display: add intel_display_conversion.c to hide stuff better
The __to_intel_display() generics require the definition of struct drm_i915_private i.e. inclusion of i915_drv.h. Add intel_display_conversion.c with a __i915_to_display() function to do the conversion without the intel_display_conversion.h having an implicit dependency on i915_drv.h.
The long term goal is to remove __to_intel_display() and the intel_display_conversion.[ch] files altoghether, and this is merely a transitional step to make the dependencies on i915_drv.h explicit.
Reviewed-by: Luca Coelho <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/39e99b765b8c1a05d001659c39686a661ac268e2.1732104170.git.jani.nikula@intel.com
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0c45e76f |
| 03-Dec-2024 |
Michael J. Ruhl <[email protected]> |
drm/xe/vsec: Support BMG devices
The Battlemage (BMG) discrete graphics card supports the Platform, Monitoring Technology (PMT) feature directly on the primary PCI device.
Utilize the PMT callback
drm/xe/vsec: Support BMG devices
The Battlemage (BMG) discrete graphics card supports the Platform, Monitoring Technology (PMT) feature directly on the primary PCI device.
Utilize the PMT callback API to add support for the BMG devices.
Reviewed-by: Ilpo Järvinen <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Signed-off-by: Michael J. Ruhl <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
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Revision tags: v6.12, v6.12-rc7 |
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6e6d7b41 |
| 04-Nov-2024 |
Tomasz Lis <[email protected]> |
drm/xe/vf: React to MIGRATED interrupt
To properly support VF Save/Restore procedure, fixups need to be applied after PF driver finishes its part of VF Restore. The fixups are required to adjust the
drm/xe/vf: React to MIGRATED interrupt
To properly support VF Save/Restore procedure, fixups need to be applied after PF driver finishes its part of VF Restore. The fixups are required to adjust the ongoing execution for a hardware switch that happened, because some GFX resources are not fully virtualized, and assigned to a VF as range from a global pool. The VF on which a VM is restored will often have different ranges provisioned than the VF on which save process happened. Those resource fixups are applied by the VF driver within a restored VM.
A VF driver gets informed that it was migrated by receiving an interrupt from each GuC. The interrupt assigned for that purpose is "GUC SW interrupt 0". Seeing that fields set from within the irq handler should be the trigger for fixups.
The VF can safely do post-migration fixups on resources associated to each GuC only after that GuC issued the MIGRATED interrupt.
This change introduces a worker to be used for post-migration fixups, and a mechanism to schedule said worker when all GuCs sent the irq.
v2: renamed and moved functions, updated logged messages, removed unused includes, used anon struct (Michal) v3: ordering, kerneldoc, asserts, debug messages, on_all_tiles -> on_all_gts (Michal) v4: fixed missing header include v5: Explained what fixups are, explained which IRQ is used, style fixes (Michal)
Bspec: 50868 Signed-off-by: Tomasz Lis <[email protected]> Reviewed-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Michal Wajdeczko <[email protected]>
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a7238ee3 |
| 04-Nov-2024 |
Lucas De Marchi <[email protected]> |
drm/xe: Add trace to lrc timestamp update
Help debugging when LRC timestamp is updated for a exec queue.
Reviewed-by: Jonathan Cavitt <[email protected]> Reviewed-by: Nirmoy Das <nirmoy.das
drm/xe: Add trace to lrc timestamp update
Help debugging when LRC timestamp is updated for a exec queue.
Reviewed-by: Jonathan Cavitt <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Reviewed-by: Umesh Nerlige Ramappa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Lucas De Marchi <[email protected]>
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Revision tags: v6.12-rc6, v6.12-rc5, v6.12-rc4 |
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0f16cd2a |
| 16-Oct-2024 |
Ville Syrjälä <[email protected]> |
drm/i915/pfit: Extract intel_pfit.c
The panel fitter code doesn't really have much to do with the rest of intel_panel.c, so extract it all into its own file.
Signed-off-by: Ville Syrjälä <ville.syr
drm/i915/pfit: Extract intel_pfit.c
The panel fitter code doesn't really have much to do with the rest of intel_panel.c, so extract it all into its own file.
Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
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Revision tags: v6.12-rc3, v6.12-rc2 |
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9c8c7a7e |
| 04-Oct-2024 |
Zhanjun Dong <[email protected]> |
drm/xe/guc: Prepare GuC register list and update ADS size for error capture
Add referenced registers defines and list of registers. Update GuC ADS size allocation to include space for the lists of e
drm/xe/guc: Prepare GuC register list and update ADS size for error capture
Add referenced registers defines and list of registers. Update GuC ADS size allocation to include space for the lists of error state capture register descriptors.
Then, populate GuC ADS with the lists of registers we want GuC to report back to host on engine reset events. This list should include global, engine-class and engine-instance registers for every engine-class type on the current hardware.
Ensure we allocate a persistent storage for the register lists that are populated into ADS so that we don't need to allocate memory during GT resets when GuC is reloaded and ADS population happens again.
Signed-off-by: Zhanjun Dong <[email protected]> Reviewed-by: Alan Previn <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Revision tags: v6.12-rc1 |
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e6229050 |
| 23-Sep-2024 |
Ville Syrjälä <[email protected]> |
drm/i915/bios: Extract soc/intel_rom.c
Abstract away the nuts and bolts of the SPI vs. PCI ROM stuff, and hide it all in soc/intel_rom.c so that the VBT code doesn't have to care about this stuff.
drm/i915/bios: Extract soc/intel_rom.c
Abstract away the nuts and bolts of the SPI vs. PCI ROM stuff, and hide it all in soc/intel_rom.c so that the VBT code doesn't have to care about this stuff.
This leaves intel_bios.c with a single codepath that can focus on the details related to the VBT layout.
This should have no functional changes.
v2: Rebase due to vbt_signature changes Drop unnecessary cast (Jani)
Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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a5b40d4f |
| 20-Sep-2024 |
Jani Nikula <[email protected]> |
drm/i915/dp: split out intel_dp_test.[ch] to a dedicated file
intel_dp.c has become huge, over 7k lines. Split out the fairly well isolated chunk of DP test code to a dedicated file intel_dp_test.[c
drm/i915/dp: split out intel_dp_test.[ch] to a dedicated file
intel_dp.c has become huge, over 7k lines. Split out the fairly well isolated chunk of DP test code to a dedicated file intel_dp_test.[ch].
Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/262d565fe59715ba297702b67d4bcca81c736dc0.1726833193.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
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ffe558da |
| 17-Sep-2024 |
Jani Nikula <[email protected]> |
drm/xe: eradicate -Ddrm_i915_gem_object=xe_bo
We've now completely stopped using drm_i915_gem_object in display code that gets built for xe. Kill off the -Ddrm_i915_gem_object=xe_bo hack. Good ridda
drm/xe: eradicate -Ddrm_i915_gem_object=xe_bo
We've now completely stopped using drm_i915_gem_object in display code that gets built for xe. Kill off the -Ddrm_i915_gem_object=xe_bo hack. Good riddance.
Reviewed-by: Maarten Lankhorst <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/0eae2b62b635acafe5dc97dc4b205aaa34ce1e53.1726589119.git.jani.nikula@intel.com
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17cd58a8 |
| 17-Sep-2024 |
Jani Nikula <[email protected]> |
drm/i915/display: start a buffer object abstraction layer
The display code needs to deal with gem objects, and mostly uses struct drm_i915_gem_object. That's not great, because for xe we need to red
drm/i915/display: start a buffer object abstraction layer
The display code needs to deal with gem objects, and mostly uses struct drm_i915_gem_object. That's not great, because for xe we need to redefine it struct xe_bo during build.
Start a common interface using struct drm_gem_object, with separate implementations for i915 and xe. For starters, convert i9xx_wm.c to use it.
Reviewed-by: Maarten Lankhorst <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/df6867523a0b5fdd4eb63f657f545603ae6f6e0b.1726589119.git.jani.nikula@intel.com
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Revision tags: v6.11 |
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d86e3737 |
| 13-Sep-2024 |
Michal Wajdeczko <[email protected]> |
drm/xe/pf: Add functions to save and restore VF GuC state
To successfully migrate a VM with attached GPU VF we also need to migrate VF's GuC state. Add necessary functions that interacts with GuC to
drm/xe/pf: Add functions to save and restore VF GuC state
To successfully migrate a VM with attached GPU VF we also need to migrate VF's GuC state. Add necessary functions that interacts with GuC to save and restore a VF GuC state. We will start using them in upcoming patches.
Since VF migration requires many more changes in the driver, enable those functions only under debug config.
Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Michał Winiarski <[email protected]> Cc: Tomasz Lis <[email protected]> Reviewed-by: Michał Winiarski <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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