Searched refs:writer_wm_sets (Results 1 – 14 of 14) sorted by relevance
494 if (ranges->writer_wm_sets[i].wm_inst > 3) in pp_rv_set_wm_ranges()498 ranges->writer_wm_sets[i].wm_inst; in pp_rv_set_wm_ranges()500 ranges->writer_wm_sets[i].max_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()502 ranges->writer_wm_sets[i].min_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()504 ranges->writer_wm_sets[i].max_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()506 ranges->writer_wm_sets[i].min_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()
504 ranges->writer_wm_sets[0].wm_inst = WM_A; in build_watermark_ranges()505 ranges->writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()506 ranges->writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()507 ranges->writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()508 ranges->writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()
1397 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1398 ranges.writer_wm_sets[0].min_fill_clk_mhz = socclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1399 ranges.writer_wm_sets[0].max_fill_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1409 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1410 ranges.writer_wm_sets[0].min_fill_clk_mhz = 200; in dcn_bw_notify_pplib_of_wm_ranges()1411 ranges.writer_wm_sets[0].max_fill_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()1412 ranges.writer_wm_sets[0].min_drain_clk_mhz = 800; in dcn_bw_notify_pplib_of_wm_ranges()1413 ranges.writer_wm_sets[0].max_drain_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()1416 ranges.reader_wm_sets[1] = ranges.writer_wm_sets[0]; in dcn_bw_notify_pplib_of_wm_ranges()1419 ranges.reader_wm_sets[2] = ranges.writer_wm_sets[0]; in dcn_bw_notify_pplib_of_wm_ranges()[all …]
439 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()441 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()443 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()445 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()448 clock_ranges->writer_wm_sets[i].wm_inst; in smu_v13_0_5_set_watermarks_table()
693 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()695 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()697 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()699 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()702 clock_ranges->writer_wm_sets[i].wm_inst; in smu_v13_0_4_set_watermarks_table()
530 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()532 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()534 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in yellow_carp_set_watermarks_table()536 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in yellow_carp_set_watermarks_table()539 clock_ranges->writer_wm_sets[i].wm_inst; in yellow_carp_set_watermarks_table()
1096 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()1098 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()1100 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()1102 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()1105 clock_ranges->writer_wm_sets[i].wm_inst; in renoir_set_watermarks_table()1107 clock_ranges->writer_wm_sets[i].wm_type; in renoir_set_watermarks_table()
94 struct pp_smu_wm_set_range writer_wm_sets[MAX_WATERMARK_SETS]; member
512 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()514 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()516 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()518 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()521 clock_ranges->writer_wm_sets[i].wm_inst; in smu_v14_0_0_set_watermarks_table()
1356 ranges.writer_wm_sets[0].wm_inst = 0; in set_wm_ranges()1357 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1358 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()1359 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1360 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()
1628 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()1630 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()1632 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()1634 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in vangogh_set_watermarks_table()1637 clock_ranges->writer_wm_sets[i].wm_inst; in vangogh_set_watermarks_table()
1901 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1903 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1905 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1907 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1910 clock_ranges->writer_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
2199 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()2201 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()2203 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()2205 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()2208 clock_ranges->writer_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
2599 ranges.writer_wm_sets[0].wm_inst = 0; in dcn20_resource_construct()2600 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2601 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()2602 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2603 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()