drm/amd/display: Add missing SMU version

This commit add PP_SMU_VER_VG to the pp_smu_ver list.

Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tes

drm/amd/display: Add missing SMU version

This commit add PP_SMU_VER_VG to the pp_smu_ver list.

Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/pm: support return vpe clock table

pm supports return vpe clock table and soc clock table

Signed-off-by: Peyton Lee <[email protected]>
Reviewed-by: Li Ma <[email protected]>
Signed-off-by: Alex

drm/amd/pm: support return vpe clock table

pm supports return vpe clock table and soc clock table

Signed-off-by: Peyton Lee <[email protected]>
Reviewed-by: Li Ma <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu/pm: display vcn pp dpm (v4)

Enable displaying DPM levels for VCN clocks
in swsmu supported ASICs

v2: removed set functions for navi, renoir
v3: removed set function from arcturus
v4: add

drm/amdgpu/pm: display vcn pp dpm (v4)

Enable displaying DPM levels for VCN clocks
in swsmu supported ASICs

v2: removed set functions for navi, renoir
v3: removed set function from arcturus
v4: added missing defines in drm_table and remove
uneeded goto label in navi10_ppt.c

Signed-off-by: David M Nieto <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed-by: Luben Tuikov <[email protected]> (v1)
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add dcn3.01 support to DC (v2)

Update dc for vangogh support.

v2: fix compilation without DCN 301 set.

Signed-off-by: Roman Li <[email protected]>
Signed-off-by: Alex Deucher <alex

drm/amd/display: Add dcn3.01 support to DC (v2)

Update dc for vangogh support.

v2: fix compilation without DCN 301 set.

Signed-off-by: Roman Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: drop BOOLEAN define in display part

use bool directly

Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Guchun Chen <[email protected]>
Signed-off-by: Alex Deucher <alexander.

drm/amdgpu: drop BOOLEAN define in display part

use bool directly

Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Guchun Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag

[Why]

DCN21 is stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were e

drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag

[Why]

DCN21 is stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup Renoir definitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN21 code in the following files:
* clk_mgr/clk_mgr.c: dc_clk_mgr_create()
* core/dc_resources.c: dc_create_resource_pool()
* gpio/hw_factory.c: dal_hw_factory_init()
* gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Bhawanpreet Lakha <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED

[Why]

DCN2 and DSC are stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The foll

drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED

[Why]

DCN2 and DSC are stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup NV defninitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN2 code in the following files:
* clk_mgr/clk_mgr.c: dc_clk_mgr_create()
* core/dc_resources.c: dc_create_resource_pool()
* dce/dce_dmcu.c: dcn20_*lock_phy()
* dce/dce_dmcu.c: dcn20_funcs
* dce/dce_dmcu.c: dcn20_dmcu_create()
* gpio/hw_factory.c: dal_hw_factory_init()
* gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Leo Li <[email protected]>
Signed-off-by: Bhawanpreet Lakha <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: fix number of dcn21 dpm clock levels

These are specific to dcn21 and should not be increased for
reuse on other asics.

Signed-off-by: Dmytro Laktyushkin <[email protected]

drm/amd/display: fix number of dcn21 dpm clock levels

These are specific to dcn21 and should not be increased for
reuse on other asics.

Signed-off-by: Dmytro Laktyushkin <[email protected]>
Reviewed-by: Chris Park <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: change PP_SM defs to 8

DPM level is 8 these were incorrect before. Fix them

Signed-off-by: Bhawanpreet Lakha <[email protected]>
Reviewed-by: Roman Li <[email protected]>
Si

drm/amd/display: change PP_SM defs to 8

DPM level is 8 these were incorrect before. Fix them

Signed-off-by: Bhawanpreet Lakha <[email protected]>
Reviewed-by: Roman Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu/display: fix build error casused by CONFIG_DRM_AMD_DC_DCN2_1

when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config,
there is build error. struct dpm_clocks shoud not be
guarded.

Signed-

drm/amdgpu/display: fix build error casused by CONFIG_DRM_AMD_DC_DCN2_1

when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config,
there is build error. struct dpm_clocks shoud not be
guarded.

Signed-off-by: Hersen Wu <[email protected]>
Reviewed-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu/display: hook renoir dc to pplib funcs

enable dc get dmp clock table and set dcn watermarks
via pplib.

Signed-off-by: Hersen Wu <[email protected]>
Reviewed-by: Bhawanpreet Lakha <Bhaw

drm/amdgpu/display: hook renoir dc to pplib funcs

enable dc get dmp clock table and set dcn watermarks
via pplib.

Signed-off-by: Hersen Wu <[email protected]>
Reviewed-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add pp_smu functions for Renoir

This defines the interface for communicating requirements
between DC and powerplay.

Acked-by: Harry Wentland <[email protected]>
Signed-off-by:

drm/amd/display: Add pp_smu functions for Renoir

This defines the interface for communicating requirements
between DC and powerplay.

Acked-by: Harry Wentland <[email protected]>
Signed-off-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add DC core changes for DCN2

Core DC changes for DCN2.

Signed-off-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Fix type of pp_smu_wm_set_range struct

[why]
Value read from SMU is 16 bits, not 32.

[How]
Fix type, and add wm_type enum in preparation for future interfaces.

Signed-off-by: Eric

drm/amd/display: Fix type of pp_smu_wm_set_range struct

[why]
Value read from SMU is 16 bits, not 32.

[How]
Fix type, and add wm_type enum in preparation for future interfaces.

Signed-off-by: Eric Yang <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Set dispclk and dprefclock directly

[Why]
To simply logic for setting DCN specific clocks, we will send
SMU message directly through the VBIOS message box.

[How]
Add new structure

drm/amd/display: Set dispclk and dprefclock directly

[Why]
To simply logic for setting DCN specific clocks, we will send
SMU message directly through the VBIOS message box.

[How]
Add new structure in pp_smu to hold functions to set clocks
through vbios message box

Signed-off-by: Eric Yang <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: remove deprecated pplib interface

[Why]
The new interface now replaces the old interface for all known
configurations.

Signed-off-by: Eric Yang <[email protected]>
Reviewed-by: To

drm/amd/display: remove deprecated pplib interface

[Why]
The new interface now replaces the old interface for all known
configurations.

Signed-off-by: Eric Yang <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Clean up old pplib interface functions

[Why]
set_display_requirement, dcn1_pplib_apply_display_requirements
are no longer used and should be removed.

Signed-off-by: Fatemeh Darbeha

drm/amd/display: Clean up old pplib interface functions

[Why]
set_display_requirement, dcn1_pplib_apply_display_requirements
are no longer used and should be removed.

Signed-off-by: Fatemeh Darbehani <[email protected]>
Reviewed-by: Hersen Wu <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: PPLIB Hookup

[Why]
Make dml and integration with pplib clearer.

[How]
Change the way the dml formula is initialized to make its values more
clear. Restructure DC interface with ppl

drm/amd/display: PPLIB Hookup

[Why]
Make dml and integration with pplib clearer.

[How]
Change the way the dml formula is initialized to make its values more
clear. Restructure DC interface with pplib into rv_funcs.
Cap clocks received from pplib.

Signed-off-by: Jun Lei <[email protected]>
Signed-off-by: Eryk Brol <[email protected]>
Reviewed-by: Dmytro Laktyushkin <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add a PP_SMU_VER_MAX enum

Signed-off-by: Jun Lei <[email protected]>
Reviewed-by: Nevenko Stupar <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deu

drm/amd/display: Add a PP_SMU_VER_MAX enum

Signed-off-by: Jun Lei <[email protected]>
Reviewed-by: Nevenko Stupar <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Clean up for DCN1 clock debug logging

[Why]
To prepare for clock debug logging. With the exception of removing
max_supported_dppclk_khz from logs, there are no functional changes.

drm/amd/display: Clean up for DCN1 clock debug logging

[Why]
To prepare for clock debug logging. With the exception of removing
max_supported_dppclk_khz from logs, there are no functional changes.

[How]
Add clk_bypass struct and clean up buffer logic

Signed-off-by: Fatemeh Darbehani <[email protected]>
Reviewed-by: Yongqiang Sun <[email protected]>
Acked-by: Su Chung <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part4

[Why]
In DCN we want direct DC to SMU calls, with minimal interference from
pplib.
The reason for each pp_smu interface mapp

drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part4

[Why]
In DCN we want direct DC to SMU calls, with minimal interference from
pplib.
The reason for each pp_smu interface mapping to 1 SMU message is so we
can have the sequencing of different SMU message in DC and shared across
different OS's.
This will also simplify debugging as DAL owns this interaction and
there's no confusion about division of ownership.

[How]
Part 4: Change clock units so they match the values PPLib sends to SMU.

Signed-off-by: Fatemeh Darbehani <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part3

[Why]
In DCN we want direct DAL to SMU calls, with as little as
possible interference by pplib. The reason for each pp_smu i

drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part3

[Why]
In DCN we want direct DAL to SMU calls, with as little as
possible interference by pplib. The reason for each pp_smu interface
mapping to 1 SMU message is so we can have the sequencing of different
SMU message in dal and shared across different OS. This will also
simplify debugging as DAL owns this interaction and there's no
confusion about division of ownership.

[How]
Separate the set_hard_min_fclk_by_freq message from the
SMU messages that are sent as part of pp_rv_set_display_requirement.
directly notify min dcfclk to smu part 2

Signed-off-by: Fatemeh Darbehani <[email protected]>
Reviewed-by: Dmytro Laktyushkin <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part2

[Why]
In DCN we want direct DAL to SMU calls, with as little as possible
interference by pplib. The reason for each pp_smu i

drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part2

[Why]
In DCN we want direct DAL to SMU calls, with as little as possible
interference by pplib. The reason for each pp_smu interface mapping to
1 SMU message is so we can have the sequencing of different SMU message
in dal and shared across different OS. This will also simplify
debugging as DAL owns this interaction and there's no confusion about
division of ownership.

[How]
Part 2: Separate set_min_deep_sleep_dcfclk message from the SMU
messages that are sent as part of dm_pp_apply_clock_for_voltage_request.
Directly notify min dcfclk to smu

Signed-off-by: Fatemeh Darbehani <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Move PME to function pointer call semantics

[why]
Legacy IRI style is not linux friendly.

[how]
New function pointer call
semantics will be used for all future PPLIB/DAL interfaces

drm/amd/display: Move PME to function pointer call semantics

[why]
Legacy IRI style is not linux friendly.

[how]
New function pointer call
semantics will be used for all future PPLIB/DAL interfaces, and also
some existing will be refactored. This change defines how the
new function pointer structures will look, as well as implements

Signed-off-by: Jun Lei <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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