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Searched refs:topckgen (Results 1 – 25 of 92) sorted by relevance

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/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dmediatek,topckgen.yaml22 - mediatek,mt6797-topckgen
23 - mediatek,mt7622-topckgen
24 - mediatek,mt8135-topckgen
25 - mediatek,mt8173-topckgen
26 - mediatek,mt8516-topckgen
33 - mediatek,mt2701-topckgen
34 - mediatek,mt2712-topckgen
35 - mediatek,mt6735-topckgen
36 - mediatek,mt6765-topckgen
37 - mediatek,mt6779-topckgen
[all …]
/linux-6.15/Documentation/devicetree/bindings/sound/
H A Dmt8186-afe-pcm.yaml36 mediatek,topckgen:
103 - mediatek,topckgen
122 mediatek,topckgen = <&topckgen>;
125 <&topckgen 15>, //CLK_TOP_AUDIO
126 <&topckgen 16>, //CLK_TOP_AUD_INTBUS
128 <&topckgen 17>, //CLK_TOP_AUD_1
130 <&topckgen 18>, //CLK_TOP_AUD_2
132 <&topckgen 19>, //CLK_TOP_AUD_ENGEN1
133 <&topckgen 101>, //CLK_TOP_APLL1_D8
135 <&topckgen 104>, //CLK_TOP_APLL2_D8
[all …]
H A Dmtk-afe-pcm.txt26 <&topckgen TOP_AUDIO_SEL>,
27 <&topckgen TOP_AUD_INTBUS_SEL>,
28 <&topckgen TOP_APLL1_DIV0>,
29 <&topckgen TOP_APLL2_DIV0>,
30 <&topckgen TOP_I2S0_M_CK_SEL>,
31 <&topckgen TOP_I2S1_M_CK_SEL>,
32 <&topckgen TOP_I2S2_M_CK_SEL>,
33 <&topckgen TOP_I2S3_M_CK_SEL>,
34 <&topckgen TOP_I2S3_B_CK_SEL>;
H A Dmt8195-afe-pcm.yaml34 mediatek,topckgen:
138 - mediatek,topckgen
157 mediatek,topckgen = <&topckgen>;
161 <&topckgen 163>, //CLK_TOP_APLL1
162 <&topckgen 166>, //CLK_TOP_APLL2
170 <&topckgen 34>, //CLK_TOP_AUDIO_H_SEL
172 <&topckgen 98>, //CLK_TOP_DPTX_M_SEL
173 <&topckgen 94>, //CLK_TOP_I2SO1_M_SEL
174 <&topckgen 95>, //CLK_TOP_I2SO2_M_SEL
175 <&topckgen 96>, //CLK_TOP_I2SI1_M_SEL
[all …]
H A Dmediatek,mt8188-afe.yaml34 mediatek,topckgen:
166 - mediatek,topckgen
186 mediatek,topckgen = <&topckgen>;
201 <&topckgen 83>, //CLK_TOP_A1SYS_HP
203 <&topckgen 32>, //CLK_TOP_AUDIO_H
205 <&topckgen 81>, //CLK_TOP_DPTX
206 <&topckgen 77>, //CLK_TOP_I2SO1
207 <&topckgen 78>, //CLK_TOP_I2SO2
208 <&topckgen 79>, //CLK_TOP_I2SI1
209 <&topckgen 80>, //CLK_TOP_I2SI2
[all …]
H A Dmediatek,mt8365-afe.yaml97 <&topckgen CLK_TOP_AUDIO_SEL>,
98 <&topckgen CLK_TOP_AUD_I2S0_M>,
99 <&topckgen CLK_TOP_AUD_I2S1_M>,
100 <&topckgen CLK_TOP_AUD_I2S2_M>,
101 <&topckgen CLK_TOP_AUD_I2S3_M>,
104 <&topckgen CLK_TOP_AUD_1_SEL>,
105 <&topckgen CLK_TOP_AUD_2_SEL>,
106 <&topckgen CLK_TOP_APLL_I2S0_SEL>,
107 <&topckgen CLK_TOP_APLL_I2S1_SEL>,
108 <&topckgen CLK_TOP_APLL_I2S2_SEL>,
[all …]
H A Dmt6797-afe-pcm.txt29 <&topckgen CLK_TOP_MUX_AUDIO>,
30 <&topckgen CLK_TOP_MUX_AUD_INTBUS>,
31 <&topckgen CLK_TOP_SYSPLL3_D4>,
32 <&topckgen CLK_TOP_SYSPLL1_D4>,
/linux-6.15/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,audsys.yaml75 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
76 <&topckgen CLK_TOP_AUD_MUX2_SEL>,
77 <&topckgen CLK_TOP_AUD_48K_TIMING>,
78 <&topckgen CLK_TOP_AUD_44K_TIMING>,
79 <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
80 <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
81 <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
87 <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
88 <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
89 <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
[all …]
/linux-6.15/arch/arm64/boot/dts/mediatek/
H A Dmt8516.dtsi182 topckgen: topckgen@10000000 { label
219 <&topckgen CLK_TOP_APXGPT>;
316 <&topckgen CLK_TOP_UART0>;
330 <&topckgen CLK_TOP_UART1>;
344 <&topckgen CLK_TOP_UART2>;
360 <&topckgen CLK_TOP_APDMA>;
375 <&topckgen CLK_TOP_APDMA>;
390 <&topckgen CLK_TOP_APDMA>;
406 <&topckgen CLK_TOP_SPI>;
470 <&topckgen CLK_TOP_PWM_B>,
[all …]
H A Dmt7622.dtsi260 <&topckgen CLK_TOP_AXI_SEL>;
292 topckgen: clock-controller@10210000 { label
331 clocks = <&topckgen CLK_TOP_RTC>;
499 <&topckgen CLK_TOP_SPI0_SEL>,
579 <&topckgen CLK_TOP_FLASH_SEL>;
591 <&topckgen CLK_TOP_SPI1_SEL>,
622 <&topckgen CLK_TOP_AUD1_SEL>,
623 <&topckgen CLK_TOP_AUD2_SEL>,
694 <&topckgen CLK_TOP_AUD2PLL>;
716 <&topckgen CLK_TOP_AXI_SEL>;
[all …]
H A Dmt7986a.dtsi156 topckgen: topckgen@1001b000 { label
202 clocks = <&topckgen CLK_TOP_PWM_SEL>,
258 <&topckgen CLK_TOP_UART_SEL>;
308 clocks = <&topckgen CLK_TOP_MPLL_D2>,
309 <&topckgen CLK_TOP_SPI_SEL>,
322 clocks = <&topckgen CLK_TOP_MPLL_D2>,
323 <&topckgen CLK_TOP_SPIM_MST_SEL>,
364 <&topckgen CLK_TOP_U2U3_XHCI_SEL>;
382 <&topckgen CLK_TOP_EMMC_250M_SEL>;
544 <&topckgen CLK_TOP_NETSYS_SEL>,
[all …]
H A Dmt2712e.dtsi90 <&topckgen CLK_TOP_F_MP0_PLL1>;
103 <&topckgen CLK_TOP_F_MP0_PLL1>;
116 <&topckgen CLK_TOP_F_BIG_PLL1>;
246 topckgen: syscon@10000000 { label
286 <&topckgen CLK_TOP_MFG_SEL>,
287 <&topckgen CLK_TOP_VENC_SEL>,
290 <&topckgen CLK_TOP_VDEC_SEL>;
557 <&topckgen CLK_TOP_SPI_SEL>,
636 <&topckgen CLK_TOP_SPI_SEL>,
649 <&topckgen CLK_TOP_SPI_SEL>,
[all …]
H A Dmt8192.dtsi453 topckgen: syscon@10000000 { label
795 <&topckgen CLK_TOP_SPI_SEL>,
843 <&topckgen CLK_TOP_SPI_SEL>,
857 <&topckgen CLK_TOP_SPI_SEL>,
871 <&topckgen CLK_TOP_SPI_SEL>,
885 <&topckgen CLK_TOP_SPI_SEL>,
899 <&topckgen CLK_TOP_SPI_SEL>,
913 <&topckgen CLK_TOP_SPI_SEL>,
983 mediatek,topckgen = <&topckgen>;
1011 <&topckgen CLK_TOP_APLL1>,
[all …]
H A Dmt8188.dtsi958 topckgen: syscon@10000000 { label
1043 <&topckgen CLK_TOP_CAM>,
1044 <&topckgen CLK_TOP_CCU>,
1410 <&topckgen CLK_TOP_DPTX>,
1449 mediatek,topckgen = <&topckgen>;
1548 <&topckgen CLK_TOP_SPI>,
1594 <&topckgen CLK_TOP_SPI>,
1607 <&topckgen CLK_TOP_SPI>,
1620 <&topckgen CLK_TOP_SPI>,
1633 <&topckgen CLK_TOP_SPI>,
[all …]
H A Dmt8186.dtsi855 topckgen: syscon@10000000 { label
990 <&topckgen CLK_TOP_MDP>,
1167 clocks = <&topckgen CLK_TOP_AUDIODSP>, <&topckgen CLK_TOP_ADSP_BUS>;
1367 <&topckgen CLK_TOP_SPI>,
1414 <&topckgen CLK_TOP_SPI>,
1427 <&topckgen CLK_TOP_SPI>,
1440 <&topckgen CLK_TOP_SPI>,
1453 <&topckgen CLK_TOP_SPI>,
1466 <&topckgen CLK_TOP_SPI>,
1507 <&topckgen CLK_TOP_AUDIO>,
[all …]
H A Dmt8173.dtsi466 <&topckgen CLK_TOP_VENC_SEL>;
534 <&topckgen CLK_TOP_RTC_SEL>;
771 <&topckgen CLK_TOP_SPI_SEL>,
867 <&topckgen CLK_TOP_AUDIO_SEL>,
869 <&topckgen CLK_TOP_APLL1_DIV0>,
870 <&topckgen CLK_TOP_APLL2_DIV0>,
889 <&topckgen CLK_TOP_APLL2>;
907 <&topckgen CLK_TOP_AXI_SEL>;
917 <&topckgen CLK_TOP_AXI_SEL>;
1408 <&topckgen CLK_TOP_VDEC_SEL>,
[all …]
H A Dmt8167.dtsi20 topckgen: topckgen@10000000 { label
21 compatible = "mediatek,mt8167-topckgen", "syscon";
51 clocks = <&topckgen CLK_TOP_SMI_MM>;
59 clocks = <&topckgen CLK_TOP_SMI_MM>,
60 <&topckgen CLK_TOP_RG_VDEC>;
67 clocks = <&topckgen CLK_TOP_SMI_MM>;
74 clocks = <&topckgen CLK_TOP_RG_AXI_MFG>,
75 <&topckgen CLK_TOP_RG_SLOW_MFG>;
H A Dmt8195.dtsi483 topckgen: syscon@10000000 { label
581 <&topckgen CLK_TOP_CAM>,
582 <&topckgen CLK_TOP_CCU>,
583 <&topckgen CLK_TOP_IMG>,
984 mediatek,topckgen = <&topckgen>;
1114 <&topckgen CLK_TOP_SPI>,
1174 <&topckgen CLK_TOP_SPI>,
1188 <&topckgen CLK_TOP_SPI>,
1202 <&topckgen CLK_TOP_SPI>,
1216 <&topckgen CLK_TOP_SPI>,
[all …]
H A Dmt7981b.dtsi66 topckgen: clock-controller@1001b000 { label
67 compatible = "mediatek,mt7981-topckgen", "syscon";
149 clocks = <&topckgen CLK_TOP_CB_M_D2>,
150 <&topckgen CLK_TOP_SPI_SEL>,
163 clocks = <&topckgen CLK_TOP_CB_M_D2>,
164 <&topckgen CLK_TOP_SPI_SEL>,
177 clocks = <&topckgen CLK_TOP_CB_M_D2>,
178 <&topckgen CLK_TOP_SPI_SEL>,
232 clocks = <&topckgen CLK_TOP_NETSYS_MCU_SEL>,
233 <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
H A Dmt8365.dtsi295 topckgen: syscon@10000000 { label
395 <&topckgen CLK_TOP_CONN_26M>;
422 <&topckgen CLK_TOP_DSP_26M>;
620 <&topckgen CLK_TOP_SPI_SEL>,
1160 <&topckgen CLK_TOP_AUDIO_SEL>,
1161 <&topckgen CLK_TOP_AUD_I2S0_M>,
1162 <&topckgen CLK_TOP_AUD_I2S1_M>,
1163 <&topckgen CLK_TOP_AUD_I2S2_M>,
1164 <&topckgen CLK_TOP_AUD_I2S3_M>,
1167 <&topckgen CLK_TOP_AUD_1_SEL>,
[all …]
H A Dmt8183.dtsi803 topckgen: syscon@10000000 { label
1179 <&topckgen CLK_TOP_MUX_SPI>,
1258 <&topckgen CLK_TOP_MUX_SPI>,
1285 <&topckgen CLK_TOP_MUX_SPI>,
1298 <&topckgen CLK_TOP_MUX_SPI>,
1371 <&topckgen CLK_TOP_MUX_SPI>,
1384 <&topckgen CLK_TOP_MUX_SPI>,
1480 <&topckgen CLK_TOP_APLL1_CK>,
1482 <&topckgen CLK_TOP_APLL2_CK>,
1484 <&topckgen CLK_TOP_APLL1_D8>,
[all …]
/linux-6.15/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi98 clocks = <&topckgen CLK_TOP_HIF_SEL>;
137 topckgen: syscon@10210000 { label
253 <&topckgen CLK_TOP_UNIVPLL2_D4>;
282 <&topckgen CLK_TOP_SPI0_SEL>,
293 <&topckgen CLK_TOP_FLASH_SEL>;
320 <&topckgen CLK_TOP_SATA_SEL>,
321 <&topckgen CLK_TOP_HIF_SEL>;
388 <&topckgen CLK_TOP_AXI_SEL>,
389 <&topckgen CLK_TOP_HIF_SEL>;
391 <&topckgen CLK_TOP_SYSPLL1_D2>,
[all …]
H A Dmt2701.dtsi126 topckgen: syscon@10000000 { label
156 clocks = <&topckgen CLK_TOP_MM_SEL>,
157 <&topckgen CLK_TOP_MFG_SEL>,
158 <&topckgen CLK_TOP_ETHIF_SEL>;
343 <&topckgen CLK_TOP_SPI0_SEL>,
389 <&topckgen CLK_TOP_FLASH_SEL>;
403 <&topckgen CLK_TOP_SPI1_SEL>,
416 <&topckgen CLK_TOP_SPI2_SEL>,
435 <&topckgen CLK_TOP_AUD_MUX1_SEL>,
613 <&topckgen CLK_TOP_ETHIF_SEL>;
[all …]
H A Dmt7623.dtsi226 topckgen: syscon@10000000 { label
228 "mediatek,mt2701-topckgen",
277 clocks = <&topckgen CLK_TOP_MM_SEL>,
278 <&topckgen CLK_TOP_MFG_SEL>,
279 <&topckgen CLK_TOP_ETHIF_SEL>;
488 <&topckgen CLK_TOP_SPI0_SEL>,
552 <&topckgen CLK_TOP_FLASH_SEL>;
567 <&topckgen CLK_TOP_SPI1_SEL>,
581 <&topckgen CLK_TOP_SPI2_SEL>,
866 <&topckgen CLK_TOP_ETHIF_SEL>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/media/
H A Dmediatek,vcodec-decoder.yaml174 <&topckgen CLK_TOP_UNIVPLL_D2>,
175 <&topckgen CLK_TOP_CCI400_SEL>,
176 <&topckgen CLK_TOP_VDEC_SEL>,
177 <&topckgen CLK_TOP_VCODECPLL>,
179 <&topckgen CLK_TOP_VENC_LT_SEL>,
180 <&topckgen CLK_TOP_VCODECPLL_370P5>;
189 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
190 <&topckgen CLK_TOP_CCI400_SEL>,
191 <&topckgen CLK_TOP_VDEC_SEL>,
195 <&topckgen CLK_TOP_UNIVPLL_D2>,
[all …]

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