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Searched refs:set_wptr (Results 1 – 25 of 51) sorted by relevance

123

/linux-6.15/drivers/gpu/drm/radeon/
H A Dradeon_asic.c194 .set_wptr = &r100_gfx_set_wptr,
344 .set_wptr = &r100_gfx_set_wptr,
358 .set_wptr = &r100_gfx_set_wptr,
915 .set_wptr = &r600_gfx_set_wptr,
928 .set_wptr = &r600_dma_set_wptr,
1013 .set_wptr = &uvd_v1_0_set_wptr,
1212 .set_wptr = &uvd_v1_0_set_wptr,
1319 .set_wptr = &r600_gfx_set_wptr,
1332 .set_wptr = &r600_dma_set_wptr,
1657 .set_wptr = &uvd_v1_0_set_wptr,
[all …]
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ring.h178 void (*set_wptr)(struct amdgpu_ring *ring); member
322 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
H A Djpeg_v2_5.c692 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
723 .set_wptr = jpeg_v2_5_dec_ring_set_wptr,
H A Dvce_v3_0.c924 .set_wptr = vce_v3_0_ring_set_wptr,
948 .set_wptr = vce_v3_0_ring_set_wptr,
H A Duvd_v6_0.c1555 .set_wptr = uvd_v6_0_ring_set_wptr,
1581 .set_wptr = uvd_v6_0_ring_set_wptr,
1610 .set_wptr = uvd_v6_0_enc_ring_set_wptr,
H A Dvce_v2_0.c641 .set_wptr = vce_v2_0_ring_set_wptr,
H A Djpeg_v3_0.c587 .set_wptr = jpeg_v3_0_dec_ring_set_wptr,
H A Damdgpu_umsch_mm.c100 .set_wptr = umsch_mm_ring_set_wptr,
H A Djpeg_v5_0_0.c669 .set_wptr = jpeg_v5_0_0_dec_ring_set_wptr,
H A Duvd_v3_1.c186 .set_wptr = uvd_v3_1_ring_set_wptr,
H A Duvd_v4_2.c780 .set_wptr = uvd_v4_2_ring_set_wptr,
H A Djpeg_v1_0.c563 .set_wptr = jpeg_v1_0_decode_ring_set_wptr,
H A Duvd_v5_0.c887 .set_wptr = uvd_v5_0_ring_set_wptr,
H A Djpeg_v2_0.c796 .set_wptr = jpeg_v2_0_dec_ring_set_wptr,
H A Djpeg_v4_0.c755 .set_wptr = jpeg_v4_0_dec_ring_set_wptr,
H A Djpeg_v4_0_5.c792 .set_wptr = jpeg_v4_0_5_dec_ring_set_wptr,
H A Dvcn_v3_0.c1833 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
1993 .set_wptr = vcn_v3_0_dec_ring_set_wptr,
2093 .set_wptr = vcn_v3_0_enc_ring_set_wptr,
H A Djpeg_v5_0_1.c728 .set_wptr = jpeg_v5_0_1_dec_ring_set_wptr,
H A Dsi_dma.c714 .set_wptr = si_dma_ring_set_wptr,
H A Duvd_v7_0.c1542 .set_wptr = uvd_v7_0_ring_set_wptr,
1574 .set_wptr = uvd_v7_0_enc_ring_set_wptr,
H A Dvce_v4_0.c830 .set_wptr = vce_v4_0_ring_set_wptr,
H A Damdgpu_vpe.c921 .set_wptr = vpe_ring_set_wptr,
H A Dvcn_v1_0.c2103 .set_wptr = vcn_v1_0_dec_ring_set_wptr,
2137 .set_wptr = vcn_v1_0_enc_ring_set_wptr,
H A Dsdma_v2_4.c1122 .set_wptr = sdma_v2_4_ring_set_wptr,
H A Dvcn_v2_0.c2136 .set_wptr = vcn_v2_0_dec_ring_set_wptr,
2166 .set_wptr = vcn_v2_0_enc_ring_set_wptr,

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