Home
last modified time | relevance | path

Searched refs:rlc (Results 1 – 25 of 28) sorted by relevance

12

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_rlc.c40 if (adev->gfx.rlc.in_safe_mode[xcc_id]) in amdgpu_gfx_rlc_enter_safe_mode()
110 src_ptr = adev->gfx.rlc.reg_list; in amdgpu_gfx_rlc_init_sr()
111 dst_ptr = adev->gfx.rlc.sr_ptr; in amdgpu_gfx_rlc_init_sr()
134 adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev); in amdgpu_gfx_rlc_init_csb()
165 &adev->gfx.rlc.cp_table_obj, in amdgpu_gfx_rlc_init_cpt()
200 dst_ptr = adev->gfx.rlc.cp_table_ptr; in amdgpu_gfx_rlc_setup_cp_table()
264 if (adev->gfx.rlc.save_restore_obj) { in amdgpu_gfx_rlc_fini()
309 adev->gfx.rlc.reg_list_size_bytes = in amdgpu_gfx_rlc_init_microcode_v2_0()
311 adev->gfx.rlc.register_list_format = in amdgpu_gfx_rlc_init_microcode_v2_0()
324 adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; in amdgpu_gfx_rlc_init_microcode_v2_0()
[all …]
H A Damdgpu_ucode.c888 ucode_addr = adev->gfx.rlc.save_restore_list_cntl; in amdgpu_ucode_init_single_fw()
892 ucode_addr = adev->gfx.rlc.save_restore_list_gpm; in amdgpu_ucode_init_single_fw()
896 ucode_addr = adev->gfx.rlc.save_restore_list_srm; in amdgpu_ucode_init_single_fw()
900 ucode_addr = adev->gfx.rlc.rlc_iram_ucode; in amdgpu_ucode_init_single_fw()
904 ucode_addr = adev->gfx.rlc.rlc_dram_ucode; in amdgpu_ucode_init_single_fw()
908 ucode_addr = adev->gfx.rlc.rlcp_ucode; in amdgpu_ucode_init_single_fw()
912 ucode_addr = adev->gfx.rlc.rlcv_ucode; in amdgpu_ucode_init_single_fw()
920 ucode_addr = adev->gfx.rlc.se0_tap_delays_ucode; in amdgpu_ucode_init_single_fw()
924 ucode_addr = adev->gfx.rlc.se1_tap_delays_ucode; in amdgpu_ucode_init_single_fw()
928 ucode_addr = adev->gfx.rlc.se2_tap_delays_ucode; in amdgpu_ucode_init_single_fw()
[all …]
H A Dgfx_v7_0.c3205 adev->gfx.rlc.reg_list_size = in gfx_v7_0_rlc_init()
3209 adev->gfx.rlc.reg_list_size = in gfx_v7_0_rlc_init()
3217 src_ptr = adev->gfx.rlc.reg_list; in gfx_v7_0_rlc_init()
3221 cs_data = adev->gfx.rlc.cs_data; in gfx_v7_0_rlc_init()
3297 if (tmp != rlc) in gfx_v7_0_update_rlc()
3298 WREG32(mmRLC_CNTL, rlc); in gfx_v7_0_update_rlc()
3429 adev->gfx.rlc.funcs->stop(adev); in gfx_v7_0_rlc_resume()
3799 if (adev->gfx.rlc.cs_data) { in gfx_v7_0_init_gfx_cgpg()
3809 if (adev->gfx.rlc.reg_list) { in gfx_v7_0_init_gfx_cgpg()
4482 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v7_0_hw_init()
[all …]
H A Dgfx_v6_0.c2357 adev->gfx.rlc.reg_list_size = in gfx_v6_0_rlc_init()
2361 src_ptr = adev->gfx.rlc.reg_list; in gfx_v6_0_rlc_init()
2362 dws = adev->gfx.rlc.reg_list_size; in gfx_v6_0_rlc_init()
2363 cs_data = adev->gfx.rlc.cs_data; in gfx_v6_0_rlc_init()
2390 dst_ptr = adev->gfx.rlc.cs_ptr; in gfx_v6_0_rlc_init()
2435 if (tmp != rlc) in gfx_v6_0_update_rlc()
2436 WREG32(mmRLC_CNTL, rlc); in gfx_v6_0_update_rlc()
2506 adev->gfx.rlc.funcs->stop(adev); in gfx_v6_0_rlc_resume()
2507 adev->gfx.rlc.funcs->reset(adev); in gfx_v6_0_rlc_resume()
2535 adev->gfx.rlc.funcs->start(adev); in gfx_v6_0_rlc_resume()
[all …]
H A Dgfx_v8_0.c1080 adev->gfx.rlc.reg_list_size_bytes = in gfx_v8_0_init_microcode()
1097 adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; in gfx_v8_0_init_microcode()
1230 if (adev->gfx.rlc.cs_data == NULL) in gfx_v8_0_get_csb_buffer()
1285 cs_data = adev->gfx.rlc.cs_data; in gfx_v8_0_rlc_init()
3880 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v8_0_init_csb()
4098 adev->gfx.rlc.funcs->stop(adev); in gfx_v8_0_rlc_resume()
4099 adev->gfx.rlc.funcs->reset(adev); in gfx_v8_0_rlc_resume()
4101 adev->gfx.rlc.funcs->start(adev); in gfx_v8_0_rlc_resume()
4893 adev->gfx.rlc.funcs->stop(adev); in gfx_v8_0_hw_fini()
4985 adev->gfx.rlc.funcs->stop(adev); in gfx_v8_0_pre_soft_reset()
[all …]
H A Dsoc15_common.h41 ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.rlcg_reg_access_supported) ? \
46 ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs && adev->gfx.rlc.rlcg_reg_access_supported) ? \
H A Dgfx_v9_0.c1408 !adev->gfx.rlc.is_rlc_v2_1)) in gfx_v9_0_check_if_need_gfxoff()
1631 if (adev->gfx.rlc.cs_data == NULL) in gfx_v9_0_get_csb_buffer()
1842 cs_data = adev->gfx.rlc.cs_data; in gfx_v9_0_rlc_init()
2295 if (adev->gfx.rlc.funcs) { in gfx_v9_0_sw_init()
2296 if (adev->gfx.rlc.funcs->init) { in gfx_v9_0_sw_init()
2746 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v9_0_init_csb()
3075 if (adev->gfx.rlc.is_rlc_v2_1) { in gfx_v9_0_init_pg()
3176 adev->gfx.rlc.funcs->stop(adev); in gfx_v9_0_rlc_resume()
3212 adev->gfx.rlc.funcs->start(adev); in gfx_v9_0_rlc_resume()
4072 adev->gfx.rlc.funcs->stop(adev); in gfx_v9_0_hw_fini()
[all …]
H A Dgfx_v12_0.c675 if (adev->gfx.rlc.cs_data == NULL) in gfx_v12_0_get_csb_buffer()
703 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v12_0_rlc_fini()
704 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v12_0_rlc_fini()
708 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v12_0_rlc_fini()
709 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v12_0_rlc_fini()
732 adev->gfx.rlc.cs_data = gfx12_cs_data; in gfx_v12_0_rlc_init()
734 cs_data = adev->gfx.rlc.cs_data; in gfx_v12_0_rlc_init()
1546 &adev->gfx.rlc.rlc_autoload_gpu_addr, in gfx_v12_0_rlc_autoload_buffer_fini()
1826 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v12_0_init_csb()
2005 adev->gfx.rlc.funcs->stop(adev); in gfx_v12_0_rlc_resume()
[all …]
H A Dgfx_v11_0.c841 if (adev->gfx.rlc.cs_data == NULL) in gfx_v11_0_get_csb_buffer()
885 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v11_0_rlc_fini()
886 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v11_0_rlc_fini()
890 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v11_0_rlc_fini()
891 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v11_0_rlc_fini()
914 adev->gfx.rlc.cs_data = gfx11_cs_data; in gfx_v11_0_rlc_init()
916 cs_data = adev->gfx.rlc.cs_data; in gfx_v11_0_rlc_init()
1823 &adev->gfx.rlc.rlc_autoload_gpu_addr, in gfx_v11_0_rlc_autoload_buffer_fini()
2154 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v11_0_init_csb()
2383 adev->gfx.rlc.funcs->stop(adev); in gfx_v11_0_rlc_resume()
[all …]
H A Dgfx_v10_0.c4304 if (adev->gfx.rlc.cs_data == NULL) in gfx_v10_0_get_csb_buffer()
4349 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v10_0_rlc_fini()
4353 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v10_0_rlc_fini()
4388 cs_data = adev->gfx.rlc.cs_data; in gfx_v10_0_rlc_init()
4871 if (adev->gfx.rlc.funcs) { in gfx_v10_0_sw_init()
4872 if (adev->gfx.rlc.funcs->init) { in gfx_v10_0_sw_init()
5411 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v10_0_init_csb()
5543 adev->gfx.rlc.funcs->stop(adev); in gfx_v10_0_rlc_resume()
5567 adev->gfx.rlc.funcs->start(adev); in gfx_v10_0_rlc_resume()
5592 &adev->gfx.rlc.rlc_toc_bo, in gfx_v10_0_parse_rlc_toc()
[all …]
H A Daldebaran.c262 adev->gfx.rlc.funcs->resume(adev); in aldebaran_mode2_restore_ip()
H A Dgfx_v9_4_3.c526 kfree(adev->gfx.rlc.register_list_format); in gfx_v9_4_3_free_microcode()
1089 r = adev->gfx.rlc.funcs->init(adev); in gfx_v9_4_3_sw_init()
1189 amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj); in gfx_v9_4_3_sw_fini()
1394 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[GET_INST(GC, xcc_id)]; in gfx_v9_4_3_init_rlcg_reg_access_ctrl()
1403 adev->gfx.rlc.rlcg_reg_access_supported = true; in gfx_v9_4_3_init_rlcg_reg_access_ctrl()
1409 if (adev->gfx.rlc.funcs->update_spm_vmid) in gfx_v9_4_3_rlc_init()
1410 adev->gfx.rlc.funcs->update_spm_vmid(adev, NULL, 0xf); in gfx_v9_4_3_rlc_init()
2314 r = adev->gfx.rlc.funcs->resume(adev); in gfx_v9_4_3_hw_init()
2413 adev->gfx.rlc.funcs->stop(adev); in gfx_v9_4_3_soft_reset()
4781 adev->gfx.rlc.funcs = &gfx_v9_4_3_rlc_funcs; in gfx_v9_4_3_set_rlc_funcs()
H A Damdgpu_ucode.h444 struct rlc_firmware_header_v1_0 rlc; member
H A Damdgpu_gfx.h365 struct amdgpu_rlc rlc; member
H A Damdgpu_virt.c1061 if (!adev->gfx.rlc.rlcg_reg_access_supported) { in amdgpu_virt_rlcg_reg_rw()
1075 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[xcc_id]; in amdgpu_virt_rlcg_reg_rw()
H A Damdgpu_device.c794 adev->gfx.rlc.rlcg_reg_access_supported && in amdgpu_device_xcc_rreg()
891 adev->gfx.rlc.funcs && in amdgpu_mm_wreg_mmio_rlc()
892 adev->gfx.rlc.funcs->is_rlcg_access_range) { in amdgpu_mm_wreg_mmio_rlc()
893 if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg)) in amdgpu_mm_wreg_mmio_rlc()
925 adev->gfx.rlc.rlcg_reg_access_supported && in amdgpu_device_xcc_wreg()
/linux-6.15/drivers/gpu/drm/radeon/
H A Devergreen.c4138 if (rdev->rlc.cp_table_obj) { in sumo_rlc_fini()
4162 src_ptr = rdev->rlc.reg_list; in sumo_rlc_init()
4163 dws = rdev->rlc.reg_list_size; in sumo_rlc_init()
4167 cs_data = rdev->rlc.cs_data; in sumo_rlc_init()
4195 r = radeon_bo_kmap(rdev->rlc.save_restore_obj, (void **)&rdev->rlc.sr_ptr); in sumo_rlc_init()
4202 dst_ptr = rdev->rlc.sr_ptr; in sumo_rlc_init()
4274 r = radeon_bo_kmap(rdev->rlc.clear_state_obj, (void **)&rdev->rlc.cs_ptr); in sumo_rlc_init()
4281 dst_ptr = rdev->rlc.cs_ptr; in sumo_rlc_init()
4325 if (rdev->rlc.cp_table_size) { in sumo_rlc_init()
4352 r = radeon_bo_kmap(rdev->rlc.cp_table_obj, (void **)&rdev->rlc.cp_table_ptr); in sumo_rlc_init()
[all …]
H A Dradeon_ucode.h215 struct rlc_firmware_header_v1_0 rlc; member
H A Dcik.c5811 if (tmp != rlc) in cik_update_rlc()
5812 WREG32(RLC_CNTL, rlc); in cik_update_rlc()
6420 if (rdev->rlc.cp_table_ptr == NULL) in cik_init_cp_pg_table()
6424 dst_ptr = rdev->rlc.cp_table_ptr; in cik_init_cp_pg_table()
6616 if (rdev->rlc.cs_data) { in cik_init_gfx_cgpg()
6626 if (rdev->rlc.reg_list) { in cik_init_gfx_cgpg()
6673 if (rdev->rlc.cs_data == NULL) in cik_get_csb_size()
6705 if (rdev->rlc.cs_data == NULL) in cik_get_csb_buffer()
8311 rdev->rlc.reg_list_size = in cik_startup()
8315 rdev->rlc.reg_list_size = in cik_startup()
[all …]
H A Dsi.c5201 static void si_update_rlc(struct radeon_device *rdev, u32 rlc) in si_update_rlc() argument
5206 if (tmp != rlc) in si_update_rlc()
5207 WREG32(RLC_CNTL, rlc); in si_update_rlc()
5263 WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); in si_init_gfx_cgpg()
5669 if (rdev->rlc.cs_data == NULL) in si_get_csb_size()
5677 for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { in si_get_csb_size()
5701 if (rdev->rlc.cs_data == NULL) in si_get_csb_buffer()
5713 for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { in si_get_csb_buffer()
6624 rdev->rlc.reg_list = verde_rlc_save_restore_register_list; in si_startup()
6625 rdev->rlc.reg_list_size = in si_startup()
[all …]
H A Dni.c2164 rdev->rlc.reg_list = tn_rlc_save_restore_register_list; in cayman_startup()
2165 rdev->rlc.reg_list_size = in cayman_startup()
2167 rdev->rlc.cs_data = cayman_cs_data; in cayman_startup()
/linux-6.15/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dphy-ctxt.c185 iwl_mvm_phy_ctxt_set_rxchain(mvm, ctxt, &cmd.rlc.rx_chain_info, in iwl_mvm_phy_send_rlc()
189 ctxt->id, cmd.rlc.rx_chain_info); in iwl_mvm_phy_send_rlc()
/linux-6.15/arch/arc/lib/
H A Dstrcmp.S77 rlc r0,0 ; r0 := r2 > r3 ? 1 : 0
/linux-6.15/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Ddatapath.h475 struct iwl_rlc_properties rlc; member
/linux-6.15/drivers/media/test-drivers/vicodec/
H A Dcodec-fwht.c55 rlc(const s16 *in, __be16 *output, int blocktype) in rlc() function
732 size = rlc(cf->coeffs, *rlco, blocktype); in encode_plane()

12