| /linux-6.15/drivers/clk/mstar/ |
| H A D | clk-msc313-mpll.c | 74 struct msc313_mpll *mpll; in msc313_mpll_probe() local
82 mpll = devm_kzalloc(dev, sizeof(*mpll), GFP_KERNEL); in msc313_mpll_probe()
83 if (!mpll) in msc313_mpll_probe()
95 if (IS_ERR(mpll->input_div)) in msc313_mpll_probe()
96 return PTR_ERR(mpll->input_div); in msc313_mpll_probe()
98 if (IS_ERR(mpll->output_div)) in msc313_mpll_probe()
107 mpll->clk_data = devm_kzalloc(dev, struct_size(mpll->clk_data, hws, in msc313_mpll_probe()
109 if (!mpll->clk_data) in msc313_mpll_probe()
116 mpll->clk_hw.init = &clk_init; in msc313_mpll_probe()
123 mpll->clk_data->hws[0] = &mpll->clk_hw; in msc313_mpll_probe()
[all …]
|
| H A D | Makefile | 7 obj-$(CONFIG_MSTAR_MSC313_MPLL) += clk-msc313-mpll.o
|
| /linux-6.15/drivers/clk/meson/ |
| H A D | clk-mpll.c | 83 sdm = meson_parm_read(clk->map, &mpll->sdm); in mpll_recalc_rate()
84 n2 = meson_parm_read(clk->map, &mpll->n2); in mpll_recalc_rate()
98 mpll->flags); in mpll_determine_rate()
119 meson_parm_write(clk->map, &mpll->sdm, sdm); in mpll_set_rate()
122 meson_parm_write(clk->map, &mpll->n2, n2); in mpll_set_rate()
132 if (mpll->init_count) in mpll_init()
134 mpll->init_count); in mpll_init()
137 meson_parm_write(clk->map, &mpll->sdm_en, 1); in mpll_init()
140 if (MESON_PARM_APPLICABLE(&mpll->ssen)) { in mpll_init()
147 if (MESON_PARM_APPLICABLE(&mpll->misc)) in mpll_init()
[all …]
|
| H A D | Makefile | 9 obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
|
| /linux-6.15/drivers/gpu/drm/radeon/ |
| H A D | radeon_clocks.c | 72 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_legacy_get_memory_clock() local
78 fb_div *= mpll->reference_freq; in radeon_legacy_get_memory_clock()
112 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_read_clocks_OF() local
187 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_get_clock_info() local
219 if (mpll->reference_div < 2) in radeon_get_clock_info()
332 mpll->min_post_div = 1; in radeon_get_clock_info()
333 mpll->max_post_div = 1; in radeon_get_clock_info()
334 mpll->min_ref_div = 2; in radeon_get_clock_info()
335 mpll->max_ref_div = 0xff; in radeon_get_clock_info()
336 mpll->min_feedback_div = 4; in radeon_get_clock_info()
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/clock/ |
| H A D | mstar,msc313-mpll.yaml | 4 $id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml#
20 const: mstar,msc313-mpll
41 mpll@206000 {
42 compatible = "mstar,msc313-mpll";
|
| H A D | mstar,msc313-cpupll.yaml | 39 #include <dt-bindings/clock/mstar-msc313-mpll.h>
44 clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
|
| H A D | sophgo,sg2042-clkgen.yaml | 28 - const: mpll
56 clock-names = "mpll",
|
| H A D | imx35-clock.yaml | 20 mpll 1
|
| H A D | imx31-clock.yaml | 22 mpll 3
|
| H A D | imx25-clock.yaml | 21 mpll 2
|
| /linux-6.15/arch/arm/boot/dts/sigmastar/ |
| H A D | mstar-v7.dtsi | 9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
153 mpll: mpll@206000 { label
154 compatible = "mstar,msc313-mpll";
164 clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
|
| /linux-6.15/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| H A D | nv04.c | 288 bool mpll = Preg == 0x4020; in setPLL_double_lowregs() local
291 uint32_t Pval = (oldPval & (mpll ? ~(0x77 << 16) : ~(7 << 16))) | in setPLL_double_lowregs()
306 if (mpll) { in setPLL_double_lowregs()
322 Pval |= mpll ? 1 << 12 : 1 << 8; in setPLL_double_lowregs()
326 if (mpll) { in setPLL_double_lowregs()
340 if (mpll) { in setPLL_double_lowregs()
349 if (mpll) { in setPLL_double_lowregs()
|
| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_atomfirmware.c | 715 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atomfirmware_get_clock_info() local
774 mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()
776 mpll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
777 mpll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
778 mpll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
779 mpll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info()
780 mpll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
781 mpll->min_feedback_div = 4; in amdgpu_atomfirmware_get_clock_info()
782 mpll->max_feedback_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
783 mpll->best_vco = 0; in amdgpu_atomfirmware_get_clock_info()
|
| H A D | amdgpu_atombios.c | 591 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atombios_get_clock_info() local
663 mpll->reference_freq = in amdgpu_atombios_get_clock_info()
665 mpll->reference_div = 0; in amdgpu_atombios_get_clock_info()
667 mpll->pll_out_min = in amdgpu_atombios_get_clock_info()
669 mpll->pll_out_max = in amdgpu_atombios_get_clock_info()
676 mpll->pll_in_min = in amdgpu_atombios_get_clock_info()
678 mpll->pll_in_max = in amdgpu_atombios_get_clock_info()
686 mpll->min_post_div = 1; in amdgpu_atombios_get_clock_info()
687 mpll->max_post_div = 1; in amdgpu_atombios_get_clock_info()
688 mpll->min_ref_div = 2; in amdgpu_atombios_get_clock_info()
[all …]
|
| /linux-6.15/arch/arm/boot/dts/qcom/ |
| H A D | qcom-ipq8064-v2.0.dtsi | 62 qcom,mpll = <5>;
68 qcom,mpll = <5>;
|
| /linux-6.15/Documentation/devicetree/bindings/phy/ |
| H A D | qcom,ipq806x-usb-phy-ss.yaml | 49 qcom,mpll:
51 description: Override value for mpll.
|
| /linux-6.15/arch/arm64/boot/dts/sprd/ |
| H A D | sharkl3.dtsi | 91 mpll: mpll@0 { label
92 compatible = "sprd,sc9863a-mpll";
|
| /linux-6.15/drivers/phy/qualcomm/ |
| H A D | phy-qcom-ipq806x-usb.c | 125 u32 mpll; member
406 data |= SSPHY_MPLL(phy_dwc3->mpll); in qcom_ipq806x_usb_ss_phy_init()
532 if (device_property_read_u32(&pdev->dev, "qcom,mpll", &phy_dwc3->mpll)) in qcom_ipq806x_usb_phy_probe()
533 phy_dwc3->mpll = SSPHY_MPLL_VALUE; in qcom_ipq806x_usb_phy_probe()
|
| /linux-6.15/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramnv50.c | 225 struct nvbios_pll mpll; in nv50_ram_calc() local
327 ret = nvbios_pll_parse(bios, 0x004008, &mpll); in nv50_ram_calc()
328 mpll.vco2.max_freq = 0; in nv50_ram_calc()
330 ret = nv04_pll_calc(subdev, &mpll, freq, in nv50_ram_calc()
348 r004008 |= (mpll.bias_p << 19) | (P << 22) | (P << 16); in nv50_ram_calc()
|
| /linux-6.15/drivers/clk/imx/ |
| H A D | clk-imx35.c | 64 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator
108 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "mpll", "ckih", base + MX35_CCM_MPCTL); in _mx35_clocks_init()
111 clk[mpll] = imx_clk_fixed_factor("mpll_075", "mpll", 3, 4); in _mx35_clocks_init()
|
| H A D | clk-imx31.c | 39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
58 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "mpll", "ckih", base + MXC_CCM_MPCTL); in _mx31_clocks_init()
|
| /linux-6.15/drivers/clk/samsung/ |
| H A D | clk-exynos5410.c | 62 apll, cpll, epll, mpll, enumerator
247 [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK,
|
| H A D | clk-s5pv210.c | 68 mpll, enumerator
717 [mpll] = PLL(pll_4502, FOUT_MPLL, "fout_mpll", "fin_pll",
729 [mpll] = PLL(pll_4502, FOUT_MPLL, "fout_mpll", "fin_pll",
|
| /linux-6.15/Documentation/devicetree/bindings/media/ |
| H A D | samsung,exynos4212-fimc-is.yaml | 55 - const: mpll
183 "mcuispdiv1", "mpll", "aclk200",
|