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Searched refs:mmRLC_CGTT_MGCG_OVERRIDE (Results 1 – 17 of 17) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c49 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
140 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
H A Dsi.c428 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
557 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
655 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
755 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
835 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc,
H A Dgfx_v8_0.c231 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
434 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
505 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
601 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
5429 data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_get_clockgating_state()
5619 temp = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_medium_grain_clock_gating()
5631 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5666 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5713 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data1); in gfx_v8_0_update_coarse_grain_clock_gating()
5738 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data1); in gfx_v8_0_update_coarse_grain_clock_gating()
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H A Dgfx_v10_0.c7907 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_medium_grain_clock_gating()
7916 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_medium_grain_clock_gating()
7937 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_medium_grain_clock_gating()
7945 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_medium_grain_clock_gating()
7975 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_3d_clock_gating()
7983 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_3d_clock_gating()
8032 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_coarse_grain_clock_gating()
8043 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_coarse_grain_clock_gating()
8091 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v10_0_update_fine_grain_clock_gating()
8096 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v10_0_update_fine_grain_clock_gating()
[all …]
H A Dgfx_v9_0.c4943 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
4956 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
4977 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
4988 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
5017 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_3d_clock_gating()
5022 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_3d_clock_gating()
5063 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_coarse_grain_clock_gating()
5072 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_coarse_grain_clock_gating()
5286 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE)); in gfx_v9_0_get_clockgating_state()
H A Dgfx_v6_0.c2597 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v6_0_enable_mgcg()
2600 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v6_0_enable_mgcg()
2610 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v6_0_enable_mgcg()
2613 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v6_0_enable_mgcg()
H A Dgfx_v7_0.c3544 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v7_0_enable_mgcg()
3548 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v7_0_enable_mgcg()
3579 orig = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v7_0_enable_mgcg()
3582 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v7_0_enable_mgcg()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1135 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3100 macro
H A Dgfx_7_0_d.h1280 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
H A Dgfx_7_2_d.h1293 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
H A Dgfx_8_0_d.h1391 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
H A Dgfx_8_1_d.h1393 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6043 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
H A Dgc_9_1_offset.h6265 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
H A Dgc_9_2_1_offset.h6241 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
H A Dgc_10_1_0_offset.h9391 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
H A Dgc_10_3_0_offset.h9213 #define mmRLC_CGTT_MGCG_OVERRIDE … macro