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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1 |
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| #
5c0a1cdd |
| 24-May-2024 |
Yunxiang Li <[email protected]> |
drm/amdgpu: fix sriov host flr handler
We send back the ready to reset message before we stop anything. This is wrong. Move it to when we are actually ready for the FLR to happen.
In the current st
drm/amdgpu: fix sriov host flr handler
We send back the ready to reset message before we stop anything. This is wrong. Move it to when we are actually ready for the FLR to happen.
In the current state since we take tens of seconds to stop everything, it is very likely that host would give up waiting and reset the GPU before we send ready, so it would be the same as before. But this gets rid of the hack with reset_domain locking and also let us tell how slow ready to reset actually is from the host. The ready to reset speed can be improved later.
Signed-off-by: Yunxiang Li <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Emily Deng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.9, v6.9-rc7, v6.9-rc6 |
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25c01191 |
| 22-Apr-2024 |
Yunxiang Li <[email protected]> |
drm/amdgpu: Add reset_context flag for host FLR
There are other reset sources that pass NULL as the job pointer, such as amdgpu_amdkfd_reset_work. Therefore, using the job pointer to check if the FL
drm/amdgpu: Add reset_context flag for host FLR
There are other reset sources that pass NULL as the job pointer, such as amdgpu_amdkfd_reset_work. Therefore, using the job pointer to check if the FLR comes from the host does not work.
Add a flag in reset_context to explicitly mark host triggered reset, and set this flag when we receive host reset notification.
Signed-off-by: Yunxiang Li <[email protected]> Reviewed-by: Emily Deng <[email protected]> Reviewed-by: Zhigang Luo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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f4322b9f |
| 22-Apr-2024 |
Yunxiang Li <[email protected]> |
drm/amdgpu: Fix two reset triggered in a row
Some times a hang GPU causes multiple reset sources to schedule resets. The second source will be able to trigger an unnecessary reset if they schedule a
drm/amdgpu: Fix two reset triggered in a row
Some times a hang GPU causes multiple reset sources to schedule resets. The second source will be able to trigger an unnecessary reset if they schedule after we call amdgpu_device_stop_pending_resets.
Move amdgpu_device_stop_pending_resets to after the reset is done. Since at this point the GPU is supposedly in a good state, any reset scheduled after this point would be a legitimate reset.
Remove unnecessary and incorrect checks for amdgpu_in_reset that was kinda serving this purpose.
Signed-off-by: Yunxiang Li <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5 |
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599f7c8b |
| 02-Aug-2023 |
Ran Sun <[email protected]> |
drm/amdgpu: Clean up errors in mxgpu_vi.c
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '-=' (ctx:WxV)
Signed-off-by: Ran Sun <[email protected]> Signed-of
drm/amdgpu: Clean up errors in mxgpu_vi.c
Fix the following errors reported by checkpatch:
ERROR: spaces required around that '-=' (ctx:WxV)
Signed-off-by: Ran Sun <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1 |
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a340847b |
| 13-Oct-2022 |
Victor Zhao <[email protected]> |
Revert "drm/amdgpu: let mode2 reset fallback to default when failure"
This reverts commit dac6b80818ac2353631c5a33d140d8d5508e2957.
This commit reverted the AMDGPU_SKIP_MODE2_RESET as it conflicts
Revert "drm/amdgpu: let mode2 reset fallback to default when failure"
This reverts commit dac6b80818ac2353631c5a33d140d8d5508e2957.
This commit reverted the AMDGPU_SKIP_MODE2_RESET as it conflicts with the original design of reset handler. Will redesign it.
Fixes: dac6b80818ac23 ("drm/amdgpu: let mode2 reset fallback to default when failure") Signed-off-by: Victor Zhao <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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b98a1648 |
| 13-Oct-2022 |
Victor Zhao <[email protected]> |
Revert "drm/amdgpu: let mode2 reset fallback to default when failure"
This reverts commit dac6b80818ac2353631c5a33d140d8d5508e2957.
This commit reverted the AMDGPU_SKIP_MODE2_RESET as it conflicts
Revert "drm/amdgpu: let mode2 reset fallback to default when failure"
This reverts commit dac6b80818ac2353631c5a33d140d8d5508e2957.
This commit reverted the AMDGPU_SKIP_MODE2_RESET as it conflicts with the original design of reset handler. Will redesign it.
Fixes: dac6b80818ac23 ("drm/amdgpu: let mode2 reset fallback to default when failure") Signed-off-by: Victor Zhao <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19 |
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dac6b808 |
| 28-Jul-2022 |
Victor Zhao <[email protected]> |
drm/amdgpu: let mode2 reset fallback to default when failure
- introduce AMDGPU_SKIP_MODE2_RESET flag - let mode2 reset fallback to default reset method if failed
v2: move this part out from the as
drm/amdgpu: let mode2 reset fallback to default when failure
- introduce AMDGPU_SKIP_MODE2_RESET flag - let mode2 reset fallback to default reset method if failed
v2: move this part out from the asic specific part
Signed-off-by: Victor Zhao <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.19-rc8, v5.19-rc7, v5.19-rc6 |
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f1549c09 |
| 08-Jul-2022 |
Likun Gao <[email protected]> |
drm/amdgpu: support reset flag set for gpu reset
Move reset_context out of gpu recover function to make it configurable for different reset purpose. For the reset way of call gpu_recovery sysfs, for
drm/amdgpu: support reset flag set for gpu reset
Move reset_context out of gpu recover function to make it configurable for different reset purpose. For the reset way of call gpu_recovery sysfs, force to use full reset method. Otherwise, try soft reset by default if the related ASIC supportted, if soft reset failed, will use full reset.
Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18 |
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cf727044 |
| 17-May-2022 |
Andrey Grodzovsky <[email protected]> |
drm/amdgpu: Rename amdgpu_device_gpu_recover_imp back to amdgpu_device_gpu_recover
We removed the wrapper that was queueing the recover function into reset domain queue who was using this name.
Sig
drm/amdgpu: Rename amdgpu_device_gpu_recover_imp back to amdgpu_device_gpu_recover
We removed the wrapper that was queueing the recover function into reset domain queue who was using this name.
Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1 |
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cfbb6b00 |
| 21-Jan-2022 |
Andrey Grodzovsky <[email protected]> |
drm/amdgpu: Rework reset domain to be refcounted.
The reset domain contains register access semaphor now and so needs to be present as long as each device in a hive needs it and so it cannot be bind
drm/amdgpu: Rework reset domain to be refcounted.
The reset domain contains register access semaphor now and so needs to be present as long as each device in a hive needs it and so it cannot be binded to XGMI hive life cycle. Adress this by making reset domain refcounted and pointed by each member of the hive and the hive itself.
v4:
Fix crash on boot witrh XGMI hive by adding type to reset_domain. XGMI will only create a new reset_domain if prevoius was of single device type meaning it's first boot. Otherwsie it will take a refocunt to exsiting reset_domain from the amdgou device.
Add a wrapper around reset_domain->refcount get/put and a wrapper around send to reset wq (Lijo)
Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Link: https://www.spinics.net/lists/amd-gfx/msg74121.html
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Revision tags: v5.16, v5.16-rc8, v5.16-rc7 |
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02599bc7 |
| 20-Dec-2021 |
Andrey Grodzovsky <[email protected]> |
drm/amd/virt: For SRIOV send GPU reset directly to TDR queue.
No need to to trigger another work queue inside the work queue.
v3:
Problem: Extra reset caused by host side FLR notification followin
drm/amd/virt: For SRIOV send GPU reset directly to TDR queue.
No need to to trigger another work queue inside the work queue.
v3:
Problem: Extra reset caused by host side FLR notification following guest side triggered reset. Fix: Preven qeuing flr_work from mailbox irq if guest already executing a reset.
Suggested-by: Liu Shaoyun <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Liu Shaoyun <[email protected]> Link: https://www.spinics.net/lists/amd-gfx/msg74114.html
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1ec5a443 |
| 27-Jan-2022 |
tangmeng <[email protected]> |
drm/amd/amdgpu: fix spelling mistake "disbale" -> "disable"
There is a spelling mistake. Fix it.
Signed-off-by: tangmeng <[email protected]> Signed-off-by: Alex Deucher <alexander.deucher@amd.
drm/amd/amdgpu: fix spelling mistake "disbale" -> "disable"
There is a spelling mistake. Fix it.
Signed-off-by: tangmeng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6 |
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c9d66b36 |
| 18-Apr-2019 |
Colin Ian King <[email protected]> |
drm/amd/amdgpu: fix spelling mistake "recieve" -> "receive"
There is a spelling mistake in a pr_err message. Fix it.
Reviewed-by: Mukesh Ojha <[email protected]> Signed-off-by: Colin Ian King <c
drm/amd/amdgpu: fix spelling mistake "recieve" -> "receive"
There is a spelling mistake in a pr_err message. Fix it.
Reviewed-by: Mukesh Ojha <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4 |
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1894687b |
| 21-Nov-2018 |
Brajeswar Ghosh <[email protected]> |
drm/amd/amdgpu: Remove duplicate header
Remove gca/gfx_8_0_sh_mask.h which is included more than once
Signed-off-by: Brajeswar Ghosh <[email protected]> Signed-off-by: Alex Deucher <alexand
drm/amd/amdgpu: Remove duplicate header
Remove gca/gfx_8_0_sh_mask.h which is included more than once
Signed-off-by: Brajeswar Ghosh <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5 |
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1ffdeca6 |
| 17-Sep-2018 |
Christian König <[email protected]> |
drm/amdgpu: move more defines into amdgpu_irq.h
Everything that isn't related to the IH ring.
Signed-off-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Si
drm/amdgpu: move more defines into amdgpu_irq.h
Everything that isn't related to the IH ring.
Signed-off-by: Christian König <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1 |
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12938fad |
| 21-Aug-2018 |
Christian König <[email protected]> |
drm/amdgpu: cleanup GPU recovery check a bit (v2)
Check if we should call the function instead of providing the forced flag.
v2: rebase on KFD changes (Alex)
Signed-off-by: Christian König <christ
drm/amdgpu: cleanup GPU recovery check a bit (v2)
Check if we should call the function instead of providing the forced flag.
v2: rebase on KFD changes (Alex)
Signed-off-by: Christian König <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4 |
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5f152b5e |
| 15-Dec-2017 |
Alex Deucher <[email protected]> |
drm/amdgpu: rename amdgpu_gpu_recover
add device to the name for consistency.
Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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9c3f2b54 |
| 14-Dec-2017 |
Alex Deucher <[email protected]> |
drm/amdgpu: rename amdgpu_program_register_sequence
add device for consistency with other functions in this file.
Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <a
drm/amdgpu: rename amdgpu_program_register_sequence
add device for consistency with other functions in this file.
Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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8854695a |
| 13-Dec-2017 |
Andrey Grodzovsky <[email protected]> |
drm/amdgpu: Simplify amdgpu_lockup_timeout usage.
With introduction of amdgpu_gpu_recovery we don't need any more to rely on amdgpu_lockup_timeout == 0 for disabling GPU reset.
Signed-off-by: Andre
drm/amdgpu: Simplify amdgpu_lockup_timeout usage.
With introduction of amdgpu_gpu_recovery we don't need any more to rely on amdgpu_lockup_timeout == 0 for disabling GPU reset.
Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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| #
dcebf026 |
| 12-Dec-2017 |
Andrey Grodzovsky <[email protected]> |
drm/amdgpu: Add gpu_recovery parameter
Add new parameter to control GPU recovery procedure.
v2: Add auto logic where reset is disabled for bare metal and enabled for SR-IOV. Allow forced reset from
drm/amdgpu: Add gpu_recovery parameter
Add new parameter to control GPU recovery procedure.
v2: Add auto logic where reset is disabled for bare metal and enabled for SR-IOV. Allow forced reset from debugfs.
Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8 |
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| #
c47b41a7 |
| 03-Nov-2017 |
Christian König <[email protected]> |
drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result
Not sure what that should originally been good for, but it doesn't seem to make any sense any more.
Signed-off-by: Christian König <c
drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result
Not sure what that should originally been good for, but it doesn't seem to make any sense any more.
Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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f4711033 |
| 30-Oct-2017 |
pding <[email protected]> |
drm/amdgpu: return error when sriov access requests get timeout
Reported-by: Sun Gary <[email protected]> Signed-off-by: pding <[email protected]> Reviewed-by: Xiangliang Yu <[email protected]>
drm/amdgpu: return error when sriov access requests get timeout
Reported-by: Sun Gary <[email protected]> Signed-off-by: pding <[email protected]> Reviewed-by: Xiangliang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.14-rc7 |
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| #
5740682e |
| 25-Oct-2017 |
Monk Liu <[email protected]> |
drm/amdgpu:implement new GPU recover(v3)
1,new imple names amdgpu_gpu_recover which gives more hint on what it does compared with gpu_reset
2,gpu_recover unify bare-metal and SR-IOV, only the asic
drm/amdgpu:implement new GPU recover(v3)
1,new imple names amdgpu_gpu_recover which gives more hint on what it does compared with gpu_reset
2,gpu_recover unify bare-metal and SR-IOV, only the asic reset part is implemented differently
3,gpu_recover will increase hang job karma and mark its entity/context as guilty if exceeds limit
V2:
4,in scheduler main routine the job from guilty context will be immedialy fake signaled after it poped from queue and its fence be set with "-ECANCELED" error
5,in scheduler recovery routine all jobs from the guilty entity would be dropped
6,in run_job() routine the real IB submission would be skipped if @skip parameter equales true or there was VRAM lost occured.
V3:
7,replace deprecated gpu reset, use new gpu recover
Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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| #
b5914238 |
| 24-Oct-2017 |
pding <[email protected]> |
drm/amdgpu/virt: implement wait_reset callbacks for vi/ai
Reviewed-by: Monk Liu <[email protected]> Signed-off-by: pding <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed
drm/amdgpu/virt: implement wait_reset callbacks for vi/ai
Reviewed-by: Monk Liu <[email protected]> Signed-off-by: pding <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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Revision tags: v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7 |
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89041940 |
| 23-Jun-2017 |
Gavin Wan <[email protected]> |
drm/amdgpu: Support passing amdgpu critical error to host via GPU Mailbox.
This feature works for SRIOV enviroment. For non-SRIOV enviroment, the trans_error function does nothing.
The error inform
drm/amdgpu: Support passing amdgpu critical error to host via GPU Mailbox.
This feature works for SRIOV enviroment. For non-SRIOV enviroment, the trans_error function does nothing.
The error information includes error_code (16bit), error_flags(16bit) and error_data(64bit). Since there are not many errors, we keep the errors in an array and transfer all errors to Host before amdgpu initialization function (amdgpu_device_init) exit.
Signed-off-by: Gavin Wan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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