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Searched refs:iir (Results 1 – 25 of 66) sorted by relevance

123

/linux-6.15/arch/parisc/kernel/
H A Dunaligned.c376 unsigned long newbase = R1(regs->iir)?regs->gr[R1(regs->iir)]:0; in handle_unaligned()
393 regs->iaoq[0], regs->iir); in handle_unaligned()
412 switch (MAJOR_OP(regs->iir)) in handle_unaligned()
417 if (regs->iir&0x20) in handle_unaligned()
421 if (regs->iir&0x200) in handle_unaligned()
438 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0)<<shift; in handle_unaligned()
440 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0); in handle_unaligned()
446 newbase += IM14(regs->iir); in handle_unaligned()
450 if (regs->iir&8) in handle_unaligned()
459 newbase += IM14(regs->iir&6); in handle_unaligned()
[all …]
H A Dtraps.c151 level, regs->iir, regs->isr, regs->ior); in show_regs()
284 unsigned iir = regs->iir; in handle_break() local
324 if (unlikely(iir != GDB_BREAK_INSN)) in handle_break()
327 iir & 31, (iir>>13) & ((1<<13)-1), in handle_break()
375 regs->iir = pim_wide->cr[19]; in transfer_pim_to_trap_frame()
399 regs->iir = pim_narrow->cr[19]; in transfer_pim_to_trap_frame()
587 if ((regs->iir & 0xffdfffe0) == 0x034008a0) { in handle_interruption()
593 if (regs->iir & 0x00200000) in handle_interruption()
594 regs->gr[regs->iir & 0x1f] = mfctl(27); in handle_interruption()
596 regs->gr[regs->iir & 0x1f] = mfctl(26); in handle_interruption()
[all …]
H A Dkgdb.c82 gr->iir = regs->iir; in pt_regs_to_gdb_regs()
113 regs->iir = gr->iir; in gdb_regs_to_pt_regs()
190 else if (trap == 9 && regs->iir == in kgdb_arch_handle_exception()
198 } else if (trap == 9 && regs->iir == in kgdb_arch_handle_exception()
H A Dtoc.c36 regs->iir = (unsigned long)toc->cr[19]; in toc20_to_pt_regs()
59 regs->iir = toc->cr[19]; in toc11_to_pt_regs()
/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_gt_irq.c26 if (iir & GUC_INTR_GUC2HOST) in guc_irq_handler()
66 const u16 iir) in gen11_other_irq_handler() argument
84 return intel_gsc_irq_handler(gt, iir); in gen11_other_irq_handler()
90 instance, iir); in gen11_other_irq_handler()
408 u32 iir; in gen8_gt_irq_handler() local
412 if (likely(iir)) { in gen8_gt_irq_handler()
414 iir >> GEN8_RCS_IRQ_SHIFT); in gen8_gt_irq_handler()
416 iir >> GEN8_BCS_IRQ_SHIFT); in gen8_gt_irq_handler()
423 if (likely(iir)) { in gen8_gt_irq_handler()
434 if (likely(iir)) { in gen8_gt_irq_handler()
[all …]
H A Dintel_gt_irq.h44 static inline void intel_engine_cs_irq(struct intel_engine_cs *engine, u16 iir) in intel_engine_cs_irq() argument
46 if (iir) in intel_engine_cs_irq()
47 engine->irq_handler(engine, iir); in intel_engine_cs_irq()
53 u16 iir)) in intel_engine_set_irq_handler() argument
H A Dintel_gsc.c292 void intel_gsc_irq_handler(struct intel_gt *gt, u32 iir) in intel_gsc_irq_handler() argument
294 if (iir & GSC_IRQ_INTF(0)) in intel_gsc_irq_handler()
296 if (iir & GSC_IRQ_INTF(1)) in intel_gsc_irq_handler()
/linux-6.15/drivers/gpu/drm/i915/
H A Di915_irq.c243 u32 iir, gt_iir, pm_iir; in valleyview_irq_handler() local
297 if (iir) in valleyview_irq_handler()
337 u32 master_ctl, iir; in cherryview_irq_handler() local
388 if (iir) in cherryview_irq_handler()
967 u32 iir; in i915_irq_handler() local
970 if (iir == 0) in i915_irq_handler()
988 if (iir & I915_USER_INTERRUPT) in i915_irq_handler()
1090 u32 iir; in i965_irq_handler() local
1093 if (iir == 0) in i965_irq_handler()
1112 iir); in i965_irq_handler()
[all …]
/linux-6.15/drivers/media/platform/ti/omap3isp/
H A Disph3a_af.c71 isp_reg_writel(af->isp, conf->iir.h_start, in h3a_af_setup_regs()
79 coef |= conf->iir.coeff_set0[index]; in h3a_af_setup_regs()
80 coef |= conf->iir.coeff_set0[index + 1] << in h3a_af_setup_regs()
88 coef |= conf->iir.coeff_set1[index]; in h3a_af_setup_regs()
89 coef |= conf->iir.coeff_set1[index + 1] << in h3a_af_setup_regs()
96 isp_reg_writel(af->isp, conf->iir.coeff_set0[10], in h3a_af_setup_regs()
257 if (cur_cfg->iir.h_start != user_cfg->iir.h_start) { in h3a_af_set_params()
262 if (cur_cfg->iir.coeff_set0[index] != in h3a_af_set_params()
263 user_cfg->iir.coeff_set0[index]) { in h3a_af_set_params()
267 if (cur_cfg->iir.coeff_set1[index] != in h3a_af_set_params()
[all …]
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_display_irq.c568 if (iir & iir_bit) in i9xx_pipestat_irq_ack()
1237 if (iir & GEN8_DE_EDP_PSR) { in gen8_de_misc_irq_handler()
1365 u32 iir; in gen8_de_irq_handler() local
1372 if (iir) { in gen8_de_irq_handler()
1383 if (iir) { in gen8_de_irq_handler()
1394 if (iir) { in gen8_de_irq_handler()
1451 if (!iir) { in gen8_de_irq_handler()
1499 if (iir) { in gen8_de_irq_handler()
1523 u32 iir; in gen11_gu_misc_irq_ack() local
1529 if (likely(iir)) in gen11_gu_misc_irq_ack()
[all …]
H A Dintel_display_irq.h55 void gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir);
73 void i9xx_pipestat_irq_ack(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
75 void i915_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPE…
76 void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPE…
H A Dintel_hotplug_irq.h19 void gen11_hpd_irq_handler(struct drm_i915_private *i915, u32 iir);
21 void xelpdp_pica_irq_handler(struct drm_i915_private *i915, u32 iir);
/linux-6.15/drivers/gpu/drm/xe/display/ext/
H A Di915_irq.c18 intel_uncore_write(uncore, regs.iir, 0xffffffff); in gen2_irq_reset()
19 intel_uncore_posting_read(uncore, regs.iir); in gen2_irq_reset()
20 intel_uncore_write(uncore, regs.iir, 0xffffffff); in gen2_irq_reset()
21 intel_uncore_posting_read(uncore, regs.iir); in gen2_irq_reset()
47 gen2_assert_iir_is_zero(uncore, regs.iir); in gen2_irq_init()
/linux-6.15/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_irq.c25 void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir) in intel_pxp_irq_handler() argument
36 if (unlikely(!iir)) in intel_pxp_irq_handler()
39 if (iir & (GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT | in intel_pxp_irq_handler()
47 if (iir & GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT) in intel_pxp_irq_handler()
H A Dintel_pxp_irq.h25 void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);
27 static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir) in intel_pxp_irq_handler() argument
/linux-6.15/drivers/tty/serial/8250/
H A D8250_fsl.c30 unsigned int iir; in fsl8250_handle_irq() local
35 iir = serial_port_in(port, UART_IIR); in fsl8250_handle_irq()
36 if (iir & UART_IIR_NO_INT) { in fsl8250_handle_irq()
54 if (unlikely((iir & UART_IIR_ID) == UART_IIR_RLSI && in fsl8250_handle_irq()
H A D8250_omap.c642 unsigned int iir, lsr; in omap8250_irq() local
663 iir = serial_port_in(port, UART_IIR); in omap8250_irq()
664 ret = serial8250_handle_irq(port, iir); in omap8250_irq()
1258 switch (iir & 0x3f) { in handle_rx_dma()
1271 (iir & UART_IIR_RDI)) { in omap_8250_handle_rx_dma()
1272 if (handle_rx_dma(up, iir)) { in omap_8250_handle_rx_dma()
1320 u8 iir; in omap_8250_dma_handle_irq() local
1322 iir = serial_port_in(port, UART_IIR); in omap_8250_dma_handle_irq()
1323 if (iir & UART_IIR_NO_INT) { in omap_8250_dma_handle_irq()
1331 if ((iir & 0x3f) != UART_IIR_THRI) { in omap_8250_dma_handle_irq()
[all …]
/linux-6.15/arch/sh/include/asm/
H A Dsmc37c93x.h74 volatile __u16 iir; member
86 #define tcr iir
92 #define fcr iir
/linux-6.15/drivers/gpu/drm/xe/
H A Dxe_heci_gsc.h37 void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir);
38 void xe_heci_csc_irq_handler(struct xe_device *xe, u32 iir);
H A Dxe_heci_gsc.c212 void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir) in xe_heci_gsc_irq_handler() argument
216 if ((iir & GSC_IRQ_INTF(1)) == 0) in xe_heci_gsc_irq_handler()
232 void xe_heci_csc_irq_handler(struct xe_device *xe, u32 iir) in xe_heci_csc_irq_handler() argument
236 if ((iir & CSC_IRQ_INTF(1)) == 0) in xe_heci_csc_irq_handler()
H A Dxe_irq.c113 u32 iir; in gu_misc_irq_ack() local
118 iir = xe_mmio_read32(mmio, IIR(GU_MISC_IRQ_OFFSET)); in gu_misc_irq_ack()
119 if (likely(iir)) in gu_misc_irq_ack()
120 xe_mmio_write32(mmio, IIR(GU_MISC_IRQ_OFFSET), iir); in gu_misc_irq_ack()
122 return iir; in gu_misc_irq_ack()
261 gt_other_irq_handler(struct xe_gt *gt, const u8 instance, const u16 iir) in gt_other_irq_handler() argument
264 return xe_guc_irq_handler(&gt->uc.guc, iir); in gt_other_irq_handler()
266 return xe_guc_irq_handler(&gt->uc.guc, iir); in gt_other_irq_handler()
268 return xe_gsc_proxy_irq_handler(&gt->uc.gsc, iir); in gt_other_irq_handler()
273 instance, iir); in gt_other_irq_handler()
/linux-6.15/arch/parisc/include/uapi/asm/
H A Dptrace.h36 unsigned long iir; /* CR19 */ member
57 unsigned long iir; /* CR19 */ member
/linux-6.15/drivers/bluetooth/
H A Ddtl1_cs.c295 int iir, lsr; in dtl1_interrupt() local
306 iir = inb(iobase + UART_IIR) & UART_IIR_ID; in dtl1_interrupt()
307 while (iir) { in dtl1_interrupt()
313 switch (iir) { in dtl1_interrupt()
328 BT_ERR("Unhandled IIR=%#x", iir); in dtl1_interrupt()
336 iir = inb(iobase + UART_IIR) & UART_IIR_ID; in dtl1_interrupt()
/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Dinterrupt.c61 #define iir_to_regbase(iir) (iir - 0x8) argument
308 u32 iir = *(u32 *)p_data; in intel_vgpu_reg_iir_handler() local
310 trace_write_ir(vgpu->id, "IIR", reg, iir, vgpu_vreg(vgpu, reg), in intel_vgpu_reg_iir_handler()
311 (vgpu_vreg(vgpu, reg) ^ iir)); in intel_vgpu_reg_iir_handler()
316 vgpu_vreg(vgpu, reg) &= ~iir; in intel_vgpu_reg_iir_handler()
385 u32 iir = regbase_to_iir( in update_upstream_irq() local
390 vgpu_vreg(vgpu, iir) |= (set_bits & ~vgpu_vreg(vgpu, imr)); in update_upstream_irq()
/linux-6.15/arch/parisc/mm/
H A Dfault.c165 if (parisc_acctyp(0, regs->iir) == VM_READ) { in fixup_exception()
166 int treg = regs->iir & 0x1f; in fixup_exception()
289 acc_type = parisc_acctyp(code, regs->iir); in do_page_fault()
455 unsigned long insn = regs->iir; in handle_nadtlb_fault()

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