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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2 |
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5f60d5f6 |
| 01-Oct-2024 |
Al Viro <[email protected]> |
move asm/unaligned.h to linux/unaligned.h
asm/unaligned.h is always an include of asm-generic/unaligned.h; might as well move that thing to linux/unaligned.h and include that - there's nothing arch-
move asm/unaligned.h to linux/unaligned.h
asm/unaligned.h is always an include of asm-generic/unaligned.h; might as well move that thing to linux/unaligned.h and include that - there's nothing arch-specific in that header.
auto-generated by the following:
for i in `git grep -l -w asm/unaligned.h`; do sed -i -e "s/asm\/unaligned.h/linux\/unaligned.h/" $i done for i in `git grep -l -w asm-generic/unaligned.h`; do sed -i -e "s/asm-generic\/unaligned.h/linux\/unaligned.h/" $i done git mv include/asm-generic/unaligned.h include/linux/unaligned.h git mv tools/include/asm-generic/unaligned.h tools/include/linux/unaligned.h sed -i -e "/unaligned.h/d" include/asm-generic/Kbuild sed -i -e "s/__ASM_GENERIC/__LINUX/" include/linux/unaligned.h tools/include/linux/unaligned.h
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Revision tags: v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5 |
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134d9882 |
| 06-Dec-2023 |
Al Viro <[email protected]> |
parisc: get rid of private asm/unaligned.h
Declarations local to arch/*/kernel/*.c are better off *not* in a public header - arch/parisc/kernel/unaligned.h is just fine for those bits.
With that do
parisc: get rid of private asm/unaligned.h
Declarations local to arch/*/kernel/*.c are better off *not* in a public header - arch/parisc/kernel/unaligned.h is just fine for those bits.
With that done parisc asm/unaligned.h is reduced to include of asm-generic/unaligned.h and can be removed - unaligned.h is in mandatory-y in include/asm-generic/Kbuild.
Acked-by: Helge Deller <[email protected]> Signed-off-by: Al Viro <[email protected]>
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cbade823 |
| 21-Jul-2024 |
Helge Deller <[email protected]> |
parisc: Add support for CONFIG_SYSCTL_ARCH_UNALIGN_NO_WARN
Allow users to disable kernel warnings for unaligned memory accesses from kernel via the /proc/sys/kernel/ignore-unaligned-usertrap procfs
parisc: Add support for CONFIG_SYSCTL_ARCH_UNALIGN_NO_WARN
Allow users to disable kernel warnings for unaligned memory accesses from kernel via the /proc/sys/kernel/ignore-unaligned-usertrap procfs entry. That way users can disable those warnings in case they happen too often.
Signed-off-by: Helge Deller <[email protected]>
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e5db6a74 |
| 16-Feb-2024 |
Guenter Roeck <[email protected]> |
parisc/unaligned: Rewrite 64-bit inline assembly of emulate_ldd()
Convert to use real temp variables instead of clobbering processor registers. This aligns the 64-bit inline assembly code with the 3
parisc/unaligned: Rewrite 64-bit inline assembly of emulate_ldd()
Convert to use real temp variables instead of clobbering processor registers. This aligns the 64-bit inline assembly code with the 32-bit assembly code which was rewritten with commit 427c1073a2a1 ("parisc/unaligned: Rewrite 32-bit inline assembly of emulate_ldd()").
While at it, fix comment in 32-bit rewrite code. Temporary variables are now used for both 32-bit and 64-bit code, so move their declarations to the function header.
No functional change intended.
Signed-off-by: Guenter Roeck <[email protected]> Cc: [email protected] # v6.0+ Signed-off-by: Helge Deller <[email protected]>
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94a1b192 |
| 22-Jan-2024 |
Helge Deller <[email protected]> |
parisc: Show kernel unaligned memory accesses
Warn if some kernel function triggers unaligned memory accesses.
Signed-off-by: Helge Deller <[email protected]>
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8b1d7239 |
| 20-Jan-2024 |
Helge Deller <[email protected]> |
parisc: Fix random data corruption from exception handler
The current exception handler implementation, which assists when accessing user space memory, may exhibit random data corruption if the comp
parisc: Fix random data corruption from exception handler
The current exception handler implementation, which assists when accessing user space memory, may exhibit random data corruption if the compiler decides to use a different register than the specified register %r29 (defined in ASM_EXCEPTIONTABLE_REG) for the error code. If the compiler choose another register, the fault handler will nevertheless store -EFAULT into %r29 and thus trash whatever this register is used for. Looking at the assembly I found that this happens sometimes in emulate_ldd().
To solve the issue, the easiest solution would be if it somehow is possible to tell the fault handler which register is used to hold the error code. Using %0 or %1 in the inline assembly is not posssible as it will show up as e.g. %r29 (with the "%r" prefix), which the GNU assembler can not convert to an integer.
This patch takes another, better and more flexible approach: We extend the __ex_table (which is out of the execution path) by one 32-word. In this word we tell the compiler to insert the assembler instruction "or %r0,%r0,%reg", where %reg references the register which the compiler choosed for the error return code. In case of an access failure, the fault handler finds the __ex_table entry and can examine the opcode. The used register is encoded in the lowest 5 bits, and the fault handler can then store -EFAULT into this register.
Since we extend the __ex_table to 3 words we can't use the BUILDTIME_TABLE_SORT config option any longer.
Signed-off-by: Helge Deller <[email protected]> Cc: <[email protected]> # v6.0+
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Revision tags: v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7 |
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98a9d5f0 |
| 19-Aug-2023 |
Helge Deller <[email protected]> |
parisc: unaligned: Simplify 32-bit assembly in emulate_std()
No need to extract upper and lower 32bit values of the 64-bit value. Use gcc's %R1 to access lower 32-bits and %1 to access upper 32-bits
parisc: unaligned: Simplify 32-bit assembly in emulate_std()
No need to extract upper and lower 32bit values of the 64-bit value. Use gcc's %R1 to access lower 32-bits and %1 to access upper 32-bits instead.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.5-rc6 |
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66f80386 |
| 10-Aug-2023 |
Helge Deller <[email protected]> |
parisc: unaligned: Include linux/sysctl.h for unaligned_enabled
Fix sparse warning that unaligned_enabled wasn't declared.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.5-rc5, v6.5-rc4, v6.5-rc3 |
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99b2f159 |
| 20-Jul-2023 |
[email protected] <[email protected]> |
parisc: unaligned: Add required spaces after ','
Fix checkpatch warnings: unaligned.c:475: ERROR: space required after that ','
Signed-off-by: Yu Han <[email protected]> Signed-off-by: Helge Dell
parisc: unaligned: Add required spaces after ','
Fix checkpatch warnings: unaligned.c:475: ERROR: space required after that ','
Signed-off-by: Yu Han <[email protected]> Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.5-rc2, v6.5-rc1 |
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646d0746 |
| 30-Jun-2023 |
Helge Deller <[email protected]> |
parisc: unaligned: Include header file to avoid missing prototype warnings
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2 |
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7ae1f550 |
| 20-Aug-2022 |
Helge Deller <[email protected]> |
parisc: Fix exception handler for fldw and fstw instructions
The exception handler is broken for unaligned memory acceses with fldw and fstw instructions, because it trashes or uses randomly some ot
parisc: Fix exception handler for fldw and fstw instructions
The exception handler is broken for unaligned memory acceses with fldw and fstw instructions, because it trashes or uses randomly some other floating point register than the one specified in the instruction word on loads and stores.
The instruction "fldw 0(addr),%fr22L" (and the other fldw/fstw instructions) encode the target register (%fr22) in the rightmost 5 bits of the instruction word. The 7th rightmost bit of the instruction word defines if the left or right half of %fr22 should be used.
While processing unaligned address accesses, the FR3() define is used to extract the offset into the local floating-point register set. But the calculation in FR3() was buggy, so that for example instead of %fr22, register %fr12 [((22 * 2) & 0x1f) = 12] was used.
This bug has been since forever in the parisc kernel and I wonder why it wasn't detected earlier. Interestingly I noticed this bug just because the libime debian package failed to build on *native* hardware, while it successfully built in qemu.
This patch corrects the bitshift and masking calculation in FR3().
Signed-off-by: Helge Deller <[email protected]> Cc: <[email protected]>
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Revision tags: v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5 |
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96b80fcd |
| 26-Jun-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Fix emulate_ldw() breakage
The commit e8aa7b17fe41 broke the 32-bit load-word unalignment exception handler because it calculated the wrong amount of bits by which the value should
parisc/unaligned: Fix emulate_ldw() breakage
The commit e8aa7b17fe41 broke the 32-bit load-word unalignment exception handler because it calculated the wrong amount of bits by which the value should be shifted. This patch fixes it.
Signed-off-by: Helge Deller <[email protected]> Fixes: e8aa7b17fe41 ("parisc/unaligned: Rewrite inline assembly of emulate_ldw()") Cc: [email protected] # v5.18
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Revision tags: v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6 |
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e5e9e7f2 |
| 24-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Enhance user-space visible output
Userspace is up to now limited to 32-bit, so it's sufficient to print only 32-bit values when showing pointer addresses.
Signed-off-by: Helge Del
parisc/unaligned: Enhance user-space visible output
Userspace is up to now limited to 32-bit, so it's sufficient to print only 32-bit values when showing pointer addresses.
Signed-off-by: Helge Deller <[email protected]>
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3029ce31 |
| 23-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Rewrite 32-bit inline assembly of emulate_sth()
Convert to use real temp variables instead of clobbering processor registers.
Signed-off-by: Helge Deller <[email protected]>
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427c1073 |
| 23-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Rewrite 32-bit inline assembly of emulate_ldd()
Convert to use real temp variables instead of clobbering processor registers.
Signed-off-by: Helge Deller <[email protected]>
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e8aa7b17 |
| 23-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Rewrite inline assembly of emulate_ldw()
Convert to use real temp variables instead of clobbering processor registers.
Signed-off-by: Helge Deller <[email protected]>
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f85b2af1 |
| 23-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Rewrite inline assembly of emulate_ldh()
Convert to use real temp variables instead of clobbering processor registers.
Signed-off-by: Helge Deller <[email protected]>
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Revision tags: v5.17-rc5 |
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d1434e03 |
| 18-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Use EFAULT fixup handler in unaligned handlers
Convert the inline assembly code to use the automatic EFAULT exception handler. With that the fixup code can be dropped.
The other c
parisc/unaligned: Use EFAULT fixup handler in unaligned handlers
Convert the inline assembly code to use the automatic EFAULT exception handler. With that the fixup code can be dropped.
The other change is to allow double-word only when a 64-bit kernel is used instead of depending on CONFIG_PA20.
Signed-off-by: Helge Deller <[email protected]>
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a9727983 |
| 18-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Fix ldw() and stw() unalignment handlers
Fix 3 bugs:
a) emulate_stw() doesn't return the error code value, so faulting instructions are not reported and aborted.
b) Tell emulate_
parisc/unaligned: Fix ldw() and stw() unalignment handlers
Fix 3 bugs:
a) emulate_stw() doesn't return the error code value, so faulting instructions are not reported and aborted.
b) Tell emulate_ldw() to handle fldw_l as floating point instruction
c) Tell emulate_ldw() to handle ldw_m as integer instruction
Signed-off-by: Helge Deller <[email protected]> Cc: [email protected]
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dd2288f4 |
| 18-Feb-2022 |
Helge Deller <[email protected]> |
parisc/unaligned: Fix fldd and fstd unaligned handlers on 32-bit kernel
Usually the kernel provides fixup routines to emulate the fldd and fstd floating-point instructions if they load or store 8-by
parisc/unaligned: Fix fldd and fstd unaligned handlers on 32-bit kernel
Usually the kernel provides fixup routines to emulate the fldd and fstd floating-point instructions if they load or store 8-byte from/to a not natuarally aligned memory location.
On a 32-bit kernel I noticed that those unaligned handlers didn't worked and instead the application got a SEGV. While checking the code I found two problems:
First, the OPCODE_FLDD_L and OPCODE_FSTD_L cases were ifdef'ed out by the CONFIG_PA20 option, and as such those weren't built on a pure 32-bit kernel. This is now fixed by moving the CONFIG_PA20 #ifdef to prevent the compilation of OPCODE_LDD_L and OPCODE_FSTD_L only, and handling the fldd and fstd instructions.
The second problem are two bugs in the 32-bit inline assembly code, where the wrong registers where used. The calculation of the natural alignment used %2 (vall) instead of %3 (ior), and the first word was stored back to address %1 (valh) instead of %3 (ior).
Signed-off-by: Helge Deller <[email protected]> Cc: [email protected]
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Revision tags: v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3 |
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de6cc651 |
| 27-May-2019 |
Thomas Gleixner <[email protected]> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 153
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 153
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 77 file(s).
Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Allison Randal <[email protected]> Reviewed-by: Armijn Hemel <[email protected]> Reviewed-by: Richard Fontana <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Revision tags: v5.2-rc2 |
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2e1661d2 |
| 23-May-2019 |
Eric W. Biederman <[email protected]> |
signal: Remove the task parameter from force_sig_fault
As synchronous exceptions really only make sense against the current task (otherwise how are you synchronous) remove the task parameter from fr
signal: Remove the task parameter from force_sig_fault
As synchronous exceptions really only make sense against the current task (otherwise how are you synchronous) remove the task parameter from from force_sig_fault to make it explicit that is what is going on.
The two known exceptions that deliver a synchronous exception to a stopped ptraced task have already been changed to force_sig_fault_to_task.
The callers have been changed with the following emacs regular expression (with obvious variations on the architectures that take more arguments) to avoid typos:
force_sig_fault[(]\([^,]+\)[,]\([^,]+\)[,]\([^,]+\)[,]\W+current[)] -> force_sig_fault(\1,\2,\3)
Signed-off-by: "Eric W. Biederman" <[email protected]>
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Revision tags: v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2 |
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| #
ccf75290 |
| 20-Apr-2018 |
Eric W. Biederman <[email protected]> |
signal/parisc: Use force_sig_fault where appropriate
Filling in struct siginfo before calling force_sig_info a tedious and error prone process, where once in a great while the wrong fields are fille
signal/parisc: Use force_sig_fault where appropriate
Filling in struct siginfo before calling force_sig_info a tedious and error prone process, where once in a great while the wrong fields are filled out, and siginfo has been inconsistently cleared.
Simplify this process by using the helper force_sig_fault. Which takes as a parameters all of the information it needs, ensures all of the fiddly bits of filling in struct siginfo are done properly and then calls force_sig_info.
In short about a 5 line reduction in code for every time force_sig_info is called, which makes the calling function clearer.
Cc: James Bottomley <[email protected]> Cc: Helge Deller <[email protected]> Cc: [email protected] Acked-by: Helge Deller <[email protected]> # parisc Signed-off-by: "Eric W. Biederman" <[email protected]>
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3eb0f519 |
| 17-Apr-2018 |
Eric W. Biederman <[email protected]> |
signal: Ensure every siginfo we send has all bits initialized
Call clear_siginfo to ensure every stack allocated siginfo is properly initialized before being passed to the signal sending functions.
signal: Ensure every siginfo we send has all bits initialized
Call clear_siginfo to ensure every stack allocated siginfo is properly initialized before being passed to the signal sending functions.
Note: It is not safe to depend on C initializers to initialize struct siginfo on the stack because C is allowed to skip holes when initializing a structure.
The initialization of struct siginfo in tracehook_report_syscall_exit was moved from the helper user_single_step_siginfo into tracehook_report_syscall_exit itself, to make it clear that the local variable siginfo gets fully initialized.
In a few cases the scope of struct siginfo has been reduced to make it clear that siginfo siginfo is not used on other paths in the function in which it is declared.
Instances of using memset to initialize siginfo have been replaced with calls clear_siginfo for clarity.
Signed-off-by: "Eric W. Biederman" <[email protected]>
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Revision tags: v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8 |
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b17b0153 |
| 08-Feb-2017 |
Ingo Molnar <[email protected]> |
sched/headers: Prepare for new header dependencies before moving code to <linux/sched/debug.h>
We are going to split <linux/sched/debug.h> out of <linux/sched.h>, which will have to be picked up fro
sched/headers: Prepare for new header dependencies before moving code to <linux/sched/debug.h>
We are going to split <linux/sched/debug.h> out of <linux/sched.h>, which will have to be picked up from other headers and a couple of .c files.
Create a trivial placeholder <linux/sched/debug.h> file that just maps to <linux/sched.h> to make this patch obviously correct and bisectable.
Include the new header in the files that are going to need it.
Acked-by: Linus Torvalds <[email protected]> Cc: Mike Galbraith <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Signed-off-by: Ingo Molnar <[email protected]>
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