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Searched refs:hw_crtc_timing (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn401/
H A Ddcn401_dio_stream_encoder.c463 hw_crtc_timing.v_total /= 2; in enc401_stream_encoder_dp_set_stream_attribute()
535 if (hw_crtc_timing.flags.DSC) { in enc401_stream_encoder_dp_set_stream_attribute()
667 h_blank = hw_crtc_timing.h_total - hw_crtc_timing.h_border_left - in enc401_stream_encoder_dp_set_stream_attribute()
668 hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right; in enc401_stream_encoder_dp_set_stream_attribute()
671 hw_crtc_timing.h_sync_width; in enc401_stream_encoder_dp_set_stream_attribute()
677 v_active_start = hw_crtc_timing.v_total - hw_crtc_timing.v_border_top - in enc401_stream_encoder_dp_set_stream_attribute()
678 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in enc401_stream_encoder_dp_set_stream_attribute()
689 hw_crtc_timing.h_sync_width, in enc401_stream_encoder_dp_set_stream_attribute()
693 hw_crtc_timing.v_sync_width, in enc401_stream_encoder_dp_set_stream_attribute()
700 hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right, in enc401_stream_encoder_dp_set_stream_attribute()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/hpo/dcn31/
H A Ddcn31_hpo_dp_stream_encoder.c216 if (hw_crtc_timing.flags.INTERLACE) { in dcn31_hpo_dp_stream_enc_set_stream_attribute()
230 switch (hw_crtc_timing.pixel_encoding) { in dcn31_hpo_dp_stream_enc_set_stream_attribute()
239 if (hw_crtc_timing.flags.Y_ONLY) { in dcn31_hpo_dp_stream_enc_set_stream_attribute()
347 h_blank = hw_crtc_timing.h_total - hw_crtc_timing.h_border_left - in dcn31_hpo_dp_stream_enc_set_stream_attribute()
348 hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
351 hw_crtc_timing.h_sync_width; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
356 v_active_start = hw_crtc_timing.v_total - hw_crtc_timing.v_border_top - in dcn31_hpo_dp_stream_enc_set_stream_attribute()
357 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in dcn31_hpo_dp_stream_enc_set_stream_attribute()
358 hw_crtc_timing.v_front_porch; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
360 …h_width = hw_crtc_timing.h_border_left + hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_ri… in dcn31_hpo_dp_stream_enc_set_stream_attribute()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn10/
H A Ddcn10_stream_encoder.c267 hw_crtc_timing.v_total /= 2; in enc1_stream_encoder_dp_set_stream_attribute()
426 h_blank = hw_crtc_timing.h_total - hw_crtc_timing.h_border_left - in enc1_stream_encoder_dp_set_stream_attribute()
427 hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right; in enc1_stream_encoder_dp_set_stream_attribute()
430 hw_crtc_timing.h_sync_width; in enc1_stream_encoder_dp_set_stream_attribute()
436 v_active_start = hw_crtc_timing.v_total - hw_crtc_timing.v_border_top - in enc1_stream_encoder_dp_set_stream_attribute()
437 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in enc1_stream_encoder_dp_set_stream_attribute()
438 hw_crtc_timing.v_front_porch; in enc1_stream_encoder_dp_set_stream_attribute()
448 hw_crtc_timing.h_sync_width, in enc1_stream_encoder_dp_set_stream_attribute()
452 hw_crtc_timing.v_sync_width, in enc1_stream_encoder_dp_set_stream_attribute()
459 hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right, in enc1_stream_encoder_dp_set_stream_attribute()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.c288 hw_crtc_timing.v_total /= 2; in dce110_stream_encoder_dp_set_stream_attribute()
461 h_blank = hw_crtc_timing.h_total - hw_crtc_timing.h_border_left - in dce110_stream_encoder_dp_set_stream_attribute()
462 hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right; in dce110_stream_encoder_dp_set_stream_attribute()
465 hw_crtc_timing.h_sync_width; in dce110_stream_encoder_dp_set_stream_attribute()
471 v_active_start = hw_crtc_timing.v_total - hw_crtc_timing.v_border_top - in dce110_stream_encoder_dp_set_stream_attribute()
472 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in dce110_stream_encoder_dp_set_stream_attribute()
473 hw_crtc_timing.v_front_porch; in dce110_stream_encoder_dp_set_stream_attribute()
485 hw_crtc_timing.h_sync_width, in dce110_stream_encoder_dp_set_stream_attribute()
489 hw_crtc_timing.v_sync_width, in dce110_stream_encoder_dp_set_stream_attribute()
497 hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right, in dce110_stream_encoder_dp_set_stream_attribute()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.c1308 struct dc_crtc_timing *hw_crtc_timing) in optc1_get_hw_timing() argument
1312 if (tg == NULL || hw_crtc_timing == NULL) in optc1_get_hw_timing()
1317 hw_crtc_timing->h_total = s.h_total + 1; in optc1_get_hw_timing()
1318 hw_crtc_timing->h_addressable = s.h_total - ((s.h_total - s.h_blank_start) + s.h_blank_end); in optc1_get_hw_timing()
1319 hw_crtc_timing->h_front_porch = s.h_total + 1 - s.h_blank_start; in optc1_get_hw_timing()
1320 hw_crtc_timing->h_sync_width = s.h_sync_a_end - s.h_sync_a_start; in optc1_get_hw_timing()
1322 hw_crtc_timing->v_total = s.v_total + 1; in optc1_get_hw_timing()
1323 hw_crtc_timing->v_addressable = s.v_total - ((s.v_total - s.v_blank_start) + s.v_blank_end); in optc1_get_hw_timing()
1324 hw_crtc_timing->v_front_porch = s.v_total + 1 - s.v_blank_start; in optc1_get_hw_timing()
1325 hw_crtc_timing->v_sync_width = s.v_sync_a_end - s.v_sync_a_start; in optc1_get_hw_timing()
/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Doptc.h75 bool optc1_get_hw_timing(struct timing_generator *tg, struct dc_crtc_timing *hw_crtc_timing);
H A Dtiming_generator.h332 struct dc_crtc_timing *hw_crtc_timing);
/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c1694 struct dc_crtc_timing hw_crtc_timing = {0}; in dc_validate_boot_timing() local
1756 if (!tg->funcs->get_hw_timing(tg, &hw_crtc_timing)) { in dc_validate_boot_timing()
1761 if (crtc_timing->h_total != hw_crtc_timing.h_total) { in dc_validate_boot_timing()
1766 if (crtc_timing->h_border_left != hw_crtc_timing.h_border_left) { in dc_validate_boot_timing()
1771 if (crtc_timing->h_addressable != hw_crtc_timing.h_addressable) { in dc_validate_boot_timing()
1786 if (crtc_timing->h_sync_width != hw_crtc_timing.h_sync_width) { in dc_validate_boot_timing()
1791 if (crtc_timing->v_total != hw_crtc_timing.v_total) { in dc_validate_boot_timing()
1796 if (crtc_timing->v_border_top != hw_crtc_timing.v_border_top) { in dc_validate_boot_timing()
1816 if (crtc_timing->v_sync_width != hw_crtc_timing.v_sync_width) { in dc_validate_boot_timing()
1869 &hw_crtc_timing.pixel_encoding, in dc_validate_boot_timing()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c2172 struct dc_crtc_timing *hw_crtc_timing; in dcn10_align_pixel_clocks() local
2185 hw_crtc_timing = kcalloc(MAX_PIPES, sizeof(*hw_crtc_timing), GFP_KERNEL); in dcn10_align_pixel_clocks()
2186 if (!hw_crtc_timing) in dcn10_align_pixel_clocks()
2201 &hw_crtc_timing[i]); in dcn10_align_pixel_clocks()
2206 hw_crtc_timing[i].pix_clk_100hz = pclk; in dcn10_align_pixel_clocks()
2216 hw_crtc_timing[i].h_total* in dcn10_align_pixel_clocks()
2217 hw_crtc_timing[i].v_total; in dcn10_align_pixel_clocks()
2253 kfree(hw_crtc_timing); in dcn10_align_pixel_clocks()