| /linux-6.15/drivers/gpu/drm/i915/gvt/ |
| H A D | Makefile | 5 gvt/cfg_space.o \
7 gvt/debugfs.o \
8 gvt/display.o \
9 gvt/dmabuf.o \
10 gvt/edid.o \
11 gvt/execlist.o \
13 gvt/firmware.o \
14 gvt/gtt.o \
17 gvt/kvmgt.o \
18 gvt/mmio.o \
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| H A D | aperture_gm.c | 44 struct intel_gvt *gvt = vgpu->gvt; in alloc_gm() local
45 struct intel_gt *gt = gvt->gt; in alloc_gm()
82 struct intel_gvt *gvt = vgpu->gvt; in alloc_vgpu_gm() local
83 struct intel_gt *gt = gvt->gt; in alloc_vgpu_gm()
110 struct intel_gvt *gvt = vgpu->gvt; in free_vgpu_gm() local
132 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_write_fence() local
168 struct intel_gvt *gvt = vgpu->gvt; in free_vgpu_fence() local
193 struct intel_gvt *gvt = vgpu->gvt; in alloc_vgpu_fence() local
235 struct intel_gvt *gvt = vgpu->gvt; in free_resource() local
245 struct intel_gvt *gvt = vgpu->gvt; in alloc_resource() local
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| H A D | sched_policy.c | 68 struct intel_gvt *gvt; member
213 struct intel_gvt *gvt = sched_data->gvt; in tbs_sched_func() local
245 mutex_lock(&gvt->sched_lock); in intel_gvt_schedule()
280 &gvt->scheduler; in tbs_sched_init()
291 data->gvt = gvt; in tbs_sched_init()
301 &gvt->scheduler; in tbs_sched_clean()
329 struct intel_gvt *gvt = vgpu->gvt; in tbs_sched_clean_vgpu() local
383 mutex_lock(&gvt->sched_lock); in intel_gvt_init_sched_policy()
385 ret = gvt->scheduler.sched_ops->init(gvt); in intel_gvt_init_sched_policy()
394 gvt->scheduler.sched_ops->clean(gvt); in intel_gvt_clean_sched_policy()
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| H A D | gvt.h | 184 struct intel_gvt *gvt; member
400 #define gvt_to_ggtt(gvt) ((gvt)->gt->ggtt) argument
403 #define gvt_aperture_sz(gvt) gvt_to_ggtt(gvt)->mappable_end argument
404 #define gvt_aperture_pa_base(gvt) gvt_to_ggtt(gvt)->gmadr.start argument
406 #define gvt_ggtt_gm_sz(gvt) gvt_to_ggtt(gvt)->vm.total argument
407 #define gvt_ggtt_sz(gvt) (gvt_to_ggtt(gvt)->vm.total >> PAGE_SHIFT << 3) argument
408 #define gvt_hidden_sz(gvt) (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt)) argument
411 #define gvt_aperture_gmadr_end(gvt) (gvt_aperture_gmadr_base(gvt) \ argument
414 #define gvt_hidden_gmadr_base(gvt) (gvt_aperture_gmadr_base(gvt) \ argument
416 #define gvt_hidden_gmadr_end(gvt) (gvt_hidden_gmadr_base(gvt) \ argument
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| H A D | mmio.c | 59 #define reg_is_mmio(gvt, reg) \ argument
62 #define reg_is_gtt(gvt, reg) \ argument
64 && reg < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt))
69 struct intel_gvt *gvt = NULL; in failsafe_emulate_mmio_rw() local
76 gvt = vgpu->gvt; in failsafe_emulate_mmio_rw()
79 if (reg_is_mmio(gvt, offset)) { in failsafe_emulate_mmio_rw()
111 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_emulate_mmio_read() local
127 if (reg_is_gtt(gvt, offset)) { in intel_vgpu_emulate_mmio_read()
186 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_emulate_mmio_write() local
203 if (reg_is_gtt(gvt, offset)) { in intel_vgpu_emulate_mmio_write()
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| H A D | vgpu.c | 114 if (!gvt->types) in intel_gvt_init_vgpu_types()
117 gvt->mdev_types = kcalloc(num_types, sizeof(*gvt->mdev_types), in intel_gvt_init_vgpu_types()
141 gvt->mdev_types[i] = &gvt->types[i].type; in intel_gvt_init_vgpu_types()
142 gvt->mdev_types[i]->sysfs_name = gvt->types[i].name; in intel_gvt_init_vgpu_types()
145 gvt->num_types = i; in intel_gvt_init_vgpu_types()
151 kfree(gvt->types); in intel_gvt_init_vgpu_types()
158 kfree(gvt->types); in intel_gvt_clean_vgpu_types()
227 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_destroy_vgpu() local
278 vgpu->gvt = gvt; in intel_gvt_create_idle_vgpu()
315 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_create_vgpu() local
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| H A D | debugfs.c | 87 struct intel_gvt *gvt = vgpu->gvt; in vgpu_mmio_diff_show() local
97 mutex_lock(&gvt->lock); in vgpu_mmio_diff_show()
98 spin_lock_bh(&gvt->scheduler.mmio_context_lock); in vgpu_mmio_diff_show()
100 mmio_hw_access_pre(gvt->gt); in vgpu_mmio_diff_show()
103 mmio_hw_access_post(gvt->gt); in vgpu_mmio_diff_show()
106 mutex_unlock(&gvt->lock); in vgpu_mmio_diff_show()
195 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_debugfs_remove_vgpu() local
198 if (minor->debugfs_root && gvt->debugfs_root) { in intel_gvt_debugfs_remove_vgpu()
215 &gvt->mmio.num_tracked_mmio); in intel_gvt_debugfs_init()
227 debugfs_remove_recursive(gvt->debugfs_root); in intel_gvt_debugfs_clean()
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| H A D | firmware.c | 59 struct drm_i915_private *i915 = gvt->gt->i915; in expose_firmware_sysfs()
92 memcpy(p, gvt->firmware.mmio, info->mmio_size); in expose_firmware_sysfs()
121 void intel_gvt_free_firmware(struct intel_gvt *gvt) in intel_gvt_free_firmware() argument
123 if (!gvt->firmware.firmware_loaded) in intel_gvt_free_firmware()
124 clean_firmware_sysfs(gvt); in intel_gvt_free_firmware()
126 kfree(gvt->firmware.cfg_space); in intel_gvt_free_firmware()
127 vfree(gvt->firmware.mmio); in intel_gvt_free_firmware()
130 static int verify_firmware(struct intel_gvt *gvt, in verify_firmware() argument
185 int intel_gvt_load_firmware(struct intel_gvt *gvt) in intel_gvt_load_firmware() argument
231 ret = verify_firmware(gvt, fw); in intel_gvt_load_firmware()
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| H A D | kvmgt.c | 850 struct intel_gvt *gvt = vgpu->gvt; in gtt_entry() local
861 offset < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt)) ? in gtt_entry()
1451 vgpu->gvt = kdev_to_i915(mdev->type->parent->dev)->gvt; in intel_vgpu_init_dev()
1523 struct intel_gvt *gvt = kdev_to_i915(mtype->parent->dev)->gvt; in intel_vgpu_get_available() local
1818 struct intel_gvt *gvt = fetch_and_zero(&i915->gvt); in intel_gvt_clean_device() local
1837 kfree(i915->gvt); in intel_gvt_clean_device()
1861 if (!gvt) in intel_gvt_init_device()
1871 i915->gvt = gvt; in intel_gvt_init_device()
1925 gvt->mdev_types, gvt->num_types); in intel_gvt_init_device()
1953 kfree(gvt); in intel_gvt_init_device()
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| H A D | gtt.c | 589 struct intel_gvt *gvt = spt->vgpu->gvt; in ppgtt_spt_get_entry() local
618 struct intel_gvt *gvt = spt->vgpu->gvt; in ppgtt_spt_set_entry() local
1339 struct intel_gvt *gvt = vgpu->gvt; in sync_oos_page() local
1381 struct intel_gvt *gvt = vgpu->gvt; in detach_oos_page() local
1400 struct intel_gvt *gvt = spt->vgpu->gvt; in attach_oos_page() local
1691 struct intel_gvt *gvt = vgpu->gvt; in invalidate_ppgtt_mm() local
1721 struct intel_gvt *gvt = vgpu->gvt; in shadow_ppgtt_mm() local
1798 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_create_ppgtt_mm() local
2006 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_gma_to_gpa() local
2143 struct intel_gvt *gvt = vgpu->gvt; in emulate_ggtt_mmio_write() local
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| H A D | mmio.h | 71 intel_gvt_render_mmio_to_engine(struct intel_gvt *gvt, unsigned int reg);
72 unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt);
74 int intel_gvt_setup_mmio_info(struct intel_gvt *gvt);
75 void intel_gvt_clean_mmio_info(struct intel_gvt *gvt);
76 int intel_gvt_for_each_tracked_mmio(struct intel_gvt *gvt,
77 int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),
80 struct intel_gvt_mmio_info *intel_gvt_find_mmio_info(struct intel_gvt *gvt,
105 void intel_gvt_restore_fence(struct intel_gvt *gvt);
106 void intel_gvt_restore_mmio(struct intel_gvt *gvt);
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| H A D | interrupt.c | 166 struct intel_gvt *gvt, in regbase_to_irq_info() argument
169 struct intel_gvt_irq *irq = &gvt->irq; in regbase_to_irq_info()
197 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reg_imr_handler() local
227 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reg_master_irq_handler() local
266 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reg_ier_handler() local
552 struct intel_gvt *gvt = irq_to_gvt(irq); in gen8_init_irq() local
597 if (HAS_ENGINE(gvt->gt, VCS1)) { in gen8_init_irq()
629 if (IS_BROADWELL(gvt->gt->i915)) { in gen8_init_irq()
680 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_trigger_virtual_event() local
681 struct intel_gvt_irq *irq = &gvt->irq; in intel_vgpu_trigger_virtual_event()
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| H A D | sched_policy.h | 41 int (*init)(struct intel_gvt *gvt);
42 void (*clean)(struct intel_gvt *gvt);
49 void intel_gvt_schedule(struct intel_gvt *gvt);
51 int intel_gvt_init_sched_policy(struct intel_gvt *gvt);
53 void intel_gvt_clean_sched_policy(struct intel_gvt *gvt);
63 void intel_gvt_kick_schedule(struct intel_gvt *gvt);
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| H A D | mmio_context.c | 176 struct intel_gvt *gvt = engine->i915->gvt; in load_render_mocs() local
179 u32 *regs = gvt->engine_mmio_list.mocs_mmio_offset_list; in load_render_mocs()
215 struct intel_gvt *gvt = vgpu->gvt; in restore_context_mmio_for_inhibit() local
231 for (mmio = gvt->engine_mmio_list.mmio; in restore_context_mmio_for_inhibit()
493 for (mmio = engine->i915->gvt->engine_mmio_list.mmio; in switch_mmio()
596 if (GRAPHICS_VER(gvt->gt->i915) >= 9) { in intel_gvt_init_engine_mmio_context()
597 gvt->engine_mmio_list.mmio = gen9_engine_mmio_list; in intel_gvt_init_engine_mmio_context()
603 gvt->engine_mmio_list.mmio = gen8_engine_mmio_list; in intel_gvt_init_engine_mmio_context()
608 for (mmio = gvt->engine_mmio_list.mmio; in intel_gvt_init_engine_mmio_context()
611 gvt->engine_mmio_list.ctx_mmio_count[mmio->id]++; in intel_gvt_init_engine_mmio_context()
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| H A D | handlers.c | 265 struct intel_gvt *gvt = vgpu->gvt; in fence_mmio_write() local
274 mmio_hw_access_pre(gvt->gt); in fence_mmio_write()
277 mmio_hw_access_post(gvt->gt); in fence_mmio_write()
1963 struct intel_gvt *gvt = vgpu->gvt; in mmio_read_from_hw() local
2850 kfree(gvt->mmio.mmio_block); in intel_gvt_clean_mmio_info()
2851 gvt->mmio.mmio_block = NULL; in intel_gvt_clean_mmio_info()
2919 gvt->mmio.num_mmio_block++; in handle_mmio_block()
2936 .i915 = gvt->gt->i915, in init_mmio_info()
2937 .data = gvt, in init_mmio_info()
2982 ret = init_mmio_info(gvt); in intel_gvt_setup_mmio_info()
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| H A D | scheduler.c | 130 struct intel_gvt *gvt = vgpu->gvt; in populate_shadow_context() local
524 struct intel_gvt *gvt = workload->vgpu->gvt; in prepare_shadow_batch_buffer() local
854 mutex_lock(&gvt->sched_lock); in pick_next_workload()
903 mutex_unlock(&gvt->sched_lock); in pick_next_workload()
1078 mutex_lock(&gvt->sched_lock); in complete_current_workload()
1144 if (gvt->scheduler.need_reschedule) in complete_current_workload()
1147 mutex_unlock(&gvt->sched_lock); in complete_current_workload()
1155 struct intel_gvt *gvt = engine->i915->gvt; in workload_thread() local
1232 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_wait_vgpu_idle() local
1251 for_each_engine(engine, gvt->gt, i) { in intel_gvt_clean_workload_scheduler()
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| H A D | cfg_space.c | 120 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_vgpu_emulate_cfg_read()
126 offset + bytes > vgpu->gvt->device_info.cfg_space_size)) in intel_vgpu_emulate_cfg_read()
259 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_vgpu_emulate_cfg_write()
266 offset + bytes > vgpu->gvt->device_info.cfg_space_size)) in intel_vgpu_emulate_cfg_write()
322 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_init_cfg_space() local
323 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev); in intel_vgpu_init_cfg_space()
324 const struct intel_gvt_device_info *info = &gvt->device_info; in intel_vgpu_init_cfg_space()
328 memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, in intel_vgpu_init_cfg_space()
343 gvt_aperture_pa_base(gvt), true); in intel_vgpu_init_cfg_space()
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| H A D | cmd_parser.c | 896 struct intel_gvt *gvt = vgpu->gvt; in cmd_reg_handler() local
926 (IS_BROADWELL(gvt->gt->i915) && in cmd_reg_handler()
1095 struct intel_gvt *gvt = s->vgpu->gvt; in cmd_handler_lrm() local
3108 struct intel_gvt *gvt = vgpu->gvt; in intel_gvt_update_reg_whitelist() local
3112 if (gvt->is_reg_whitelist_updated) in intel_gvt_update_reg_whitelist()
3157 gvt->is_reg_whitelist_updated = true; in intel_gvt_update_reg_whitelist()
3232 add_cmd_entry(gvt, e); in init_cmd_table()
3250 hash_init(gvt->cmd_table); in clean_cmd_table()
3255 clean_cmd_table(gvt); in intel_gvt_clean_cmd_parser()
3262 ret = init_cmd_table(gvt); in intel_gvt_init_cmd_parser()
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| H A D | cmd_parser.h | 46 void intel_gvt_clean_cmd_parser(struct intel_gvt *gvt);
48 int intel_gvt_init_cmd_parser(struct intel_gvt *gvt);
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| H A D | display.c | 71 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in edp_pipe_is_enabled()
84 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in pipe_is_enabled()
185 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in emulate_monitor_status_change()
545 intel_gvt_request_service(vgpu->gvt, in vblank_timer_fn()
554 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in setup_virtual_dp_monitor()
636 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in emulate_vblank_on_pipe()
666 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_vgpu_emulate_vblank()
686 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_vgpu_emulate_hotplug()
775 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_clean_display()
801 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_init_display()
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| H A D | gtt.h | 223 int intel_gvt_init_gtt(struct intel_gvt *gvt);
224 void intel_gvt_clean_gtt(struct intel_gvt *gvt);
291 void intel_gvt_restore_ggtt(struct intel_gvt *gvt);
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| H A D | scheduler.h | 139 int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt);
141 void intel_gvt_clean_workload_scheduler(struct intel_gvt *gvt);
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| H A D | edid.c | 143 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in gmbus0_mmio_write()
284 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in gmbus3_mmio_write()
381 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_i2c_handle_gmbus_read()
411 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_i2c_handle_gmbus_write()
483 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_i2c_handle_aux_ch_write()
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| H A D | fb_decoder.c | 156 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_get_stride()
213 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_decode_primary_plane()
344 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in intel_vgpu_decode_cursor_plane()
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| H A D | mmio_context.h | 53 void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt);
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