Home
last modified time | relevance | path

Searched refs:fld (Results 1 – 25 of 54) sorted by relevance

123

/linux-6.15/arch/riscv/kernel/
H A Dfpu.S71 fld f0, TASK_THREAD_F0_F0(a0)
72 fld f1, TASK_THREAD_F1_F0(a0)
73 fld f2, TASK_THREAD_F2_F0(a0)
74 fld f3, TASK_THREAD_F3_F0(a0)
75 fld f4, TASK_THREAD_F4_F0(a0)
76 fld f5, TASK_THREAD_F5_F0(a0)
77 fld f6, TASK_THREAD_F6_F0(a0)
78 fld f7, TASK_THREAD_F7_F0(a0)
79 fld f8, TASK_THREAD_F8_F0(a0)
80 fld f9, TASK_THREAD_F9_F0(a0)
[all …]
/linux-6.15/include/linux/mlx5/
H A Ddevice.h51 #define __mlx5_bit_sz(typ, fld) sizeof(__mlx5_nullp(typ)->fld) argument
53 #define __mlx5_16_off(typ, fld) (__mlx5_bit_off(typ, fld) / 16) argument
54 #define __mlx5_dw_off(typ, fld) (__mlx5_bit_off(typ, fld) / 32) argument
55 #define __mlx5_64_off(typ, fld) (__mlx5_bit_off(typ, fld) / 64) argument
56 #define __mlx5_16_bit_off(typ, fld) (16 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0xf… argument
57 #define __mlx5_dw_bit_off(typ, fld) (32 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0x1… argument
59 #define __mlx5_dw_mask(typ, fld) (__mlx5_mask(typ, fld) << __mlx5_dw_bit_off(typ, fld)) argument
61 #define __mlx5_16_mask(typ, fld) (__mlx5_mask16(typ, fld) << __mlx5_16_bit_off(typ, fld)) argument
70 #define MLX5_BYTE_OFF(typ, fld) (__mlx5_bit_off(typ, fld) / 8) argument
97 __mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \
[all …]
/linux-6.15/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_stats.h45 #define MLX5E_DECLARE_STAT(type, fld) #fld, offsetof(type, fld) argument
46 #define MLX5E_DECLARE_RX_STAT(type, fld) "rx%d_"#fld, offsetof(type, fld) argument
47 #define MLX5E_DECLARE_TX_STAT(type, fld) "tx%d_"#fld, offsetof(type, fld) argument
48 #define MLX5E_DECLARE_XDPSQ_STAT(type, fld) "tx%d_xdp_"#fld, offsetof(type, fld) argument
50 #define MLX5E_DECLARE_XSKRQ_STAT(type, fld) "rx%d_xsk_"#fld, offsetof(type, fld) argument
51 #define MLX5E_DECLARE_XSKSQ_STAT(type, fld) "tx%d_xsk_"#fld, offsetof(type, fld) argument
52 #define MLX5E_DECLARE_CH_STAT(type, fld) "ch%d_"#fld, offsetof(type, fld) argument
54 #define MLX5E_DECLARE_PTP_TX_STAT(type, fld) "ptp_tx%d_"#fld, offsetof(type, fld) argument
55 #define MLX5E_DECLARE_PTP_CH_STAT(type, fld) "ptp_ch_"#fld, offsetof(type, fld) argument
56 #define MLX5E_DECLARE_PTP_CQ_STAT(type, fld) "ptp_cq%d_"#fld, offsetof(type, fld) argument
[all …]
/linux-6.15/arch/riscv/kvm/
H A Dvcpu_switch.S405 fld f0, KVM_ARCH_FP_D_F0(a0)
406 fld f1, KVM_ARCH_FP_D_F1(a0)
407 fld f2, KVM_ARCH_FP_D_F2(a0)
408 fld f3, KVM_ARCH_FP_D_F3(a0)
409 fld f4, KVM_ARCH_FP_D_F4(a0)
410 fld f5, KVM_ARCH_FP_D_F5(a0)
411 fld f6, KVM_ARCH_FP_D_F6(a0)
412 fld f7, KVM_ARCH_FP_D_F7(a0)
413 fld f8, KVM_ARCH_FP_D_F8(a0)
414 fld f9, KVM_ARCH_FP_D_F9(a0)
[all …]
/linux-6.15/scripts/coccinelle/misc/
H A Ddoubleinit.cocci18 identifier I, s, fld;
23 struct I s =@p0 { ..., .fld@p = E, ...};
26 identifier I, s, r.fld;
31 struct I s =@p0 { ..., .fld@p = E, ...};
35 fld << r.fld;
41 cocci.print_main(fld,p0)
47 fld << r.fld;
53 msg = "%s: first occurrence line %s, second occurrence line %s" % (fld,ps[0].line,pr[0].line)
/linux-6.15/drivers/net/ethernet/mellanox/mlx5/core/diag/
H A Dfs_tracepoint.c41 {.m = MLX5_GET(spec, mask, fld),\
42 .v = MLX5_GET(spec, val, fld)}
45 {.m = MLX5_GET_BE(type, spec, mask, fld),\
46 .v = MLX5_GET_BE(type, spec, val, fld)}
50 (name.m = MLX5_GET(type, mask, fld), \
51 name.v = MLX5_GET(type, val, fld), \
66 #define MASK_VAL_L2(type, name, fld) \ in print_lyr_2_4_hdrs() argument
87 #define MASK_VAL_L2_BE(type, name, fld) \ in print_lyr_2_4_hdrs() argument
135 MASK_VAL_L2(type, name, fld); \ in print_lyr_2_4_hdrs()
158 #define MASK_VAL_MISC(type, name, fld) \ in print_misc_parameters_hdrs() argument
[all …]
/linux-6.15/arch/loongarch/kernel/
H A Dfpu.S65 EX fld.d $f0, \base, (0 * FPU_REG_WIDTH)
66 EX fld.d $f1, \base, (1 * FPU_REG_WIDTH)
67 EX fld.d $f2, \base, (2 * FPU_REG_WIDTH)
68 EX fld.d $f3, \base, (3 * FPU_REG_WIDTH)
69 EX fld.d $f4, \base, (4 * FPU_REG_WIDTH)
70 EX fld.d $f5, \base, (5 * FPU_REG_WIDTH)
71 EX fld.d $f6, \base, (6 * FPU_REG_WIDTH)
72 EX fld.d $f7, \base, (7 * FPU_REG_WIDTH)
73 EX fld.d $f8, \base, (8 * FPU_REG_WIDTH)
74 EX fld.d $f9, \base, (9 * FPU_REG_WIDTH)
[all …]
/linux-6.15/scripts/gcc-plugins/
H A Dlatent_entropy_plugin.c167 tree fld, lst = TYPE_FIELDS(type); in handle_latent_entropy_attribute() local
170 for (fld = lst; fld; nelt++, fld = TREE_CHAIN(fld)) { in handle_latent_entropy_attribute()
173 fieldtype = TREE_TYPE(fld); in handle_latent_entropy_attribute()
179 *node, name, fld); in handle_latent_entropy_attribute()
183 if (fld) in handle_latent_entropy_attribute()
188 for (fld = lst; fld; fld = TREE_CHAIN(fld)) { in handle_latent_entropy_attribute()
189 tree random_const, fld_t = TREE_TYPE(fld); in handle_latent_entropy_attribute()
192 CONSTRUCTOR_APPEND_ELT(vals, fld, random_const); in handle_latent_entropy_attribute()
/linux-6.15/arch/arm64/include/asm/
H A Dkvm_host.h1519 ((u64)SYS_FIELD_VALUE(id, fld, val))
1530 FIELD_GET(id##_##fld##_MASK, __val); \
1540 get_idreg_field_unsigned(kvm, id, fld)
1543 (get_idreg_field_signed((kvm), id, fld) op __expand_field_sign_signed(id, fld, limit))
1546 (get_idreg_field_unsigned((kvm), id, fld) op __expand_field_sign_unsigned(id, fld, limit))
1549 (id##_##fld##_SIGNED ? \
1553 #define kvm_has_feat(kvm, id, fld, limit) \ argument
1554 kvm_cmp_feat(kvm, id, fld, >=, limit)
1557 kvm_cmp_feat_unsigned(kvm, id, fld, ==, val)
1560 (kvm_cmp_feat(kvm, id, fld, >=, min) && \
[all …]
H A Del2_setup.h338 .macro __check_override idreg, fld, width, pass, fail, tmp1, tmp2
339 ubfx \tmp1, \tmp1, #\fld, #\width
345 ubfx \tmp2, \tmp2, #\fld, #\width
346 ubfx \tmp1, \tmp1, #\fld, #\width
355 .macro check_override idreg, fld, pass, fail, tmp1, tmp2
357 __check_override \idreg \fld 4 \pass \fail \tmp1 \tmp2
361 .macro __check_override idreg, fld, width, pass, fail, tmp, ignore
363 ubfx \tmp, \tmp, #\fld, #\width
368 .macro check_override idreg, fld, pass, fail, tmp, ignore
369 __check_override \idreg \fld 4 \pass \fail \tmp \ignore
/linux-6.15/drivers/accel/ivpu/
H A Divpu_hw_reg_io.h49 #define REGB_POLL_FLD(reg, fld, exp_fld_val, timeout_us) \ argument
50 ivpu_hw_reg_poll_fld(vdev, vdev->regb, reg, reg##_##fld##_MASK, \
51 FIELD_PREP(reg##_##fld##_MASK, exp_fld_val), timeout_us, \
52 __func__, #reg, #fld)
54 #define REGV_POLL_FLD(reg, fld, exp_fld_val, timeout_us) \ argument
55 ivpu_hw_reg_poll_fld(vdev, vdev->regv, reg, reg##_##fld##_MASK, \
56 FIELD_PREP(reg##_##fld##_MASK, exp_fld_val), timeout_us, \
57 __func__, #reg, #fld)
/linux-6.15/arch/loongarch/include/asm/
H A Dasmmacro.h171 fld.d $f0, \tmp, THREAD_FPR0 - THREAD_FPR0
172 fld.d $f1, \tmp, THREAD_FPR1 - THREAD_FPR0
173 fld.d $f2, \tmp, THREAD_FPR2 - THREAD_FPR0
174 fld.d $f3, \tmp, THREAD_FPR3 - THREAD_FPR0
175 fld.d $f4, \tmp, THREAD_FPR4 - THREAD_FPR0
176 fld.d $f5, \tmp, THREAD_FPR5 - THREAD_FPR0
177 fld.d $f6, \tmp, THREAD_FPR6 - THREAD_FPR0
178 fld.d $f7, \tmp, THREAD_FPR7 - THREAD_FPR0
179 fld.d $f8, \tmp, THREAD_FPR8 - THREAD_FPR0
180 fld.d $f9, \tmp, THREAD_FPR9 - THREAD_FPR0
[all …]
/linux-6.15/drivers/clk/baikal-t1/
H A Dccu-pll.c385 struct ccu_pll_dbgfs_fld *fld = priv; in ccu_pll_dbgfs_fld_set() local
386 struct ccu_pll *pll = fld->pll; in ccu_pll_dbgfs_fld_set()
390 val = clamp_t(u64, val, fld->min, fld->max); in ccu_pll_dbgfs_fld_set()
391 data = ((val - 1) << fld->lsb) & fld->mask; in ccu_pll_dbgfs_fld_set()
394 regmap_update_bits(pll->sys_regs, pll->reg_ctl + fld->reg, fld->mask, in ccu_pll_dbgfs_fld_set()
427 struct ccu_pll_dbgfs_fld *fld = priv; in ccu_pll_dbgfs_fld_get() local
428 struct ccu_pll *pll = fld->pll; in ccu_pll_dbgfs_fld_get()
431 regmap_read(pll->sys_regs, pll->reg_ctl + fld->reg, &data); in ccu_pll_dbgfs_fld_get()
432 *val = ((data & fld->mask) >> fld->lsb) + 1; in ccu_pll_dbgfs_fld_get()
/linux-6.15/arch/arm64/kvm/hyp/nvhe/
H A Dsys_regs.c39 #define __MAX_FEAT_FUNC(id, fld, max, func, sgn) \ argument
42 .shift = id##_##fld##_SHIFT, \
43 .width = id##_##fld##_WIDTH, \
44 .max_val = id##_##fld##_##max, \
48 #define MAX_FEAT_FUNC(id, fld, max, func) \ argument
49 __MAX_FEAT_FUNC(id, fld, max, func, id##_##fld##_SIGNED)
51 #define MAX_FEAT(id, fld, max) \ argument
52 MAX_FEAT_FUNC(id, fld, max, NULL)
54 #define MAX_FEAT_ENUM(id, fld, max) \ argument
55 __MAX_FEAT_FUNC(id, fld, max, NULL, false)
/linux-6.15/drivers/power/supply/
H A Dmp2629_charger.c164 enum mp2629_field fld, in mp2629_get_prop() argument
170 ret = regmap_field_read(charger->regmap_fields[fld], &rval); in mp2629_get_prop()
174 val->intval = rval * props[fld].step + props[fld].min; in mp2629_get_prop()
180 enum mp2629_field fld, in mp2629_set_prop() argument
185 if (val->intval < props[fld].min || val->intval > props[fld].max) in mp2629_set_prop()
188 rval = (val->intval - props[fld].min) / props[fld].step; in mp2629_set_prop()
189 return regmap_field_write(charger->regmap_fields[fld], rval); in mp2629_set_prop()
/linux-6.15/drivers/perf/
H A Darm_spe_pmu.c994 int fld; in __arm_spe_pmu_dev_probe() local
1001 if (!fld) { in __arm_spe_pmu_dev_probe()
1004 fld, smp_processor_id()); in __arm_spe_pmu_dev_probe()
1007 spe_pmu->pmsver = (u16)fld; in __arm_spe_pmu_dev_probe()
1019 spe_pmu->align = 1 << fld; in __arm_spe_pmu_dev_probe()
1022 fld, smp_processor_id()); in __arm_spe_pmu_dev_probe()
1054 switch (fld) { in __arm_spe_pmu_dev_probe()
1078 fld); in __arm_spe_pmu_dev_probe()
1089 fld, smp_processor_id()); in __arm_spe_pmu_dev_probe()
1094 switch (fld) { in __arm_spe_pmu_dev_probe()
[all …]
/linux-6.15/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dtout.c106 #define MLX5_TIMEOUT_QUERY(fld, reg_out) \ argument
112 time_field = MLX5_ADDR_OF(dtor_reg, reg_out, fld); \
119 #define MLX5_TIMEOUT_FILL(fld, reg_out, dev, to_type, to_extra) \ argument
121 u64 fw_to = MLX5_TIMEOUT_QUERY(fld, reg_out); \
/linux-6.15/drivers/net/ethernet/intel/ice/
H A Dice_flow.c936 switch (fld) { in ice_flow_xtract_fld()
1066 flds[fld].xtrct.prot_id = prot_id; in ice_flow_xtract_fld()
1067 flds[fld].xtrct.off = (ice_flds_info[fld].off / ese_bits) * in ice_flow_xtract_fld()
1069 flds[fld].xtrct.disp = (u8)(ice_flds_info[fld].off % ese_bits); in ice_flow_xtract_fld()
1071 flds[fld].xtrct.mask = ice_flds_info[fld].mask; in ice_flow_xtract_fld()
1076 cnt = DIV_ROUND_UP(flds[fld].xtrct.disp + ice_flds_info[fld].size, in ice_flow_xtract_fld()
1080 off = flds[fld].xtrct.off; in ice_flow_xtract_fld()
1081 mask = flds[fld].xtrct.mask; in ice_flow_xtract_fld()
1834 u64 bit = BIT_ULL(fld); in ice_flow_set_fld_ext()
1840 seg->fields[fld].type = field_type; in ice_flow_set_fld_ext()
[all …]
/linux-6.15/drivers/media/platform/ti/vpe/
H A Dvpdma.h200 #define ADB_ADDR(dma_buf, str, fld) ((dma_buf)->addr + offsetof(str, fld)) argument
201 #define MMR_ADB_ADDR(buf, str, fld) ADB_ADDR(&(buf), struct str, fld) argument
/linux-6.15/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3-sva.c213 unsigned long reg, fld; in arm_smmu_sva_supported() local
237 fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_EL1_PARANGE_SHIFT); in arm_smmu_sva_supported()
238 oas = id_aa64mmfr0_parange_to_phys_shift(fld); in arm_smmu_sva_supported()
243 fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_EL1_ASIDBITS_SHIFT); in arm_smmu_sva_supported()
244 asid_bits = fld ? 16 : 8; in arm_smmu_sva_supported()
/linux-6.15/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net_xsk.c24 rx_ring->rxds[idx].fld.reserved = 0; in nfp_net_xsk_rx_bufs_stash()
25 rx_ring->rxds[idx].fld.meta_len_dd = 0; in nfp_net_xsk_rx_bufs_stash()
77 nfp_desc_set_dma_addr_48b(&rx_ring->rxds[wr_idx].fld, in nfp_net_xsk_rx_ring_fill_freelist()
/linux-6.15/tools/lib/bpf/
H A Dbpf_core_read.h47 #define __CORE_BITFIELD_PROBE_READ(dst, src, fld) \ argument
50 __CORE_RELO(src, fld, BYTE_SIZE), \
51 (const void *)src + __CORE_RELO(src, fld, BYTE_OFFSET))
57 #define __CORE_BITFIELD_PROBE_READ(dst, src, fld) \ argument
59 (void *)dst + (8 - __CORE_RELO(src, fld, BYTE_SIZE)), \
60 __CORE_RELO(src, fld, BYTE_SIZE), \
61 (const void *)src + __CORE_RELO(src, fld, BYTE_OFFSET))
/linux-6.15/drivers/irqchip/
H A Dirq-gic-v4.c96 unsigned long fld, reg = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); in gic_cpuif_has_vsgi() local
98 fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64PFR0_EL1_GIC_SHIFT); in gic_cpuif_has_vsgi()
100 return fld >= ID_AA64PFR0_EL1_GIC_V4P1; in gic_cpuif_has_vsgi()
/linux-6.15/arch/arm64/mm/
H A Dcontext.c45 int fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64MMFR0_EL1), in get_cpu_asid_bits() local
48 switch (fld) { in get_cpu_asid_bits()
51 smp_processor_id(), fld); in get_cpu_asid_bits()
/linux-6.15/scripts/coccinelle/null/
H A Dkmerr.cocci23 identifier f,fld;
27 ... when != x->fld

123