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Searched refs:clear_state_gpu_addr (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_rlc.h269 uint64_t clear_state_gpu_addr; member
H A Damdgpu_rlc.c139 &adev->gfx.rlc.clear_state_gpu_addr, in amdgpu_gfx_rlc_init_csb()
272 &adev->gfx.rlc.clear_state_gpu_addr, in amdgpu_gfx_rlc_fini()
H A Dgfx_v6_0.c2381 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v6_0_rlc_init()
2391 reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256; in gfx_v6_0_rlc_init()
2803 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_gfx_cgpg()
2910 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_pg()
2918 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_pg()
H A Dgfx_v7_0.c3801 WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
3802 WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
4462 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v7_0_sw_fini()
H A Dgfx_v12_0.c703 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v12_0_rlc_fini()
1829 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v12_0_init_csb()
1831 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v12_0_init_csb()
H A Dgfx_v10_0.c4348 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v10_0_rlc_fini()
5416 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v10_0_init_csb()
5418 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v10_0_init_csb()
5422 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v10_0_init_csb()
5424 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v10_0_init_csb()
H A Dgfx_v8_0.c2073 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v8_0_sw_fini()
3883 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v8_0_init_csb()
3885 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v8_0_init_csb()
H A Dgfx_v11_0.c885 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v11_0_rlc_fini()
2157 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v11_0_init_csb()
2159 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v11_0_init_csb()
H A Dgfx_v9_0.c2454 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v9_0_sw_fini()
2749 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v9_0_init_csb()
2751 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v9_0_init_csb()
/linux-6.15/drivers/gpu/drm/radeon/
H A Devergreen.c4266 &rdev->rlc.clear_state_gpu_addr); in sumo_rlc_init()
4285 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256; in sumo_rlc_init()
4292 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4); in sumo_rlc_init()
4412 WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in evergreen_rlc_resume()
H A Dsi.c5269 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_gfx_cgpg()
5766 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_pg()
5772 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_pg()
H A Dradeon.h955 uint64_t clear_state_gpu_addr; member
H A Dcik.c6618 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()
6619 WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()