drm/amdgpu: add rlc TOC header file for soc24

Add RLC autoload TOC header file for soc24 ASIC.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed

drm/amdgpu: add rlc TOC header file for soc24

Add RLC autoload TOC header file for soc24 ASIC.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add new TOC structure

Add new RLC_TABLE_OF_CONTENT structure definition.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: A

drm/amdgpu: add new TOC structure

Add new RLC_TABLE_OF_CONTENT structure definition.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/amdgpu: Update RLC_SPM_MC_CNT by ring wreg in guest

Submit command of wreg in GFX and COMPUTE ring to update
RLC_SPM_MC_CNT in guest machine during runtime.

Signed-off-by: YuanShang <YuanSh

drm/amd/amdgpu: Update RLC_SPM_MC_CNT by ring wreg in guest

Submit command of wreg in GFX and COMPUTE ring to update
RLC_SPM_MC_CNT in guest machine during runtime.

Signed-off-by: YuanShang <[email protected]>
Reviewed-by: Emily Deng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: Add RLCG interface driver implementation for gfx v9.4.3 (v3)

Add RLCG interface support for gfx v9.4.3 and multiple XCCs.
Do not enable it yet.

v2: Fix amdgpu_rlcg_reg_access_ctrl init,

drm/amdgpu: Add RLCG interface driver implementation for gfx v9.4.3 (v3)

Add RLCG interface support for gfx v9.4.3 and multiple XCCs.
Do not enable it yet.

v2: Fix amdgpu_rlcg_reg_access_ctrl init, add support for multiple XCCs
in amdgpu_mm_wreg_mmio_rlc

v3: Use GET_INST() when indexing amdgpu_rlcg_reg_access_ctrl

Signed-off-by: Victor Lu <[email protected]>
Reviewed-by: Zhigang Luo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add xcc index argument to rlc safe_mode func (v4)

v1: To support multple XCD case (Le)
v2: unify naming style (Le)
v3: apply the changes to gc v11_0 (Hawking)
v4: apply the changes to gc

drm/amdgpu: add xcc index argument to rlc safe_mode func (v4)

v1: To support multple XCD case (Le)
v2: unify naming style (Le)
v3: apply the changes to gc v11_0 (Hawking)
v4: apply the changes to gc SOC21 (Morris)

Signed-off-by: Le Ma <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Hawking Zhang <[email protected]>
Signed-off-by: Morris Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add helper to init rlc firmware

To initialzie rlc firmware according to rlc
firmware header version

v2: squash in backwards compat fix

Signed-off-by: Hawking Zhang <[email protected]

drm/amdgpu: add helper to init rlc firmware

To initialzie rlc firmware according to rlc
firmware header version

v2: squash in backwards compat fix

Signed-off-by: Hawking Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add helper to init rlc firmware

To initialzie rlc firmware according to rlc
firmware header version

v2: squash in backwards compat fix

Signed-off-by: Hawking Zhang <[email protected]

drm/amdgpu: add helper to init rlc firmware

To initialzie rlc firmware according to rlc
firmware header version

v2: squash in backwards compat fix

Signed-off-by: Hawking Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/amdgpu: add TAP_DELAYS upload support for gfx10

Support {GLOBAL/SE0/SE1/SE2/SE3}_TAP_DELAYS uploading.

v2: upload TAP_DELAYS before RLC autoload was triggered. (Hawking)

Signed-off-by: Che

drm/amd/amdgpu: add TAP_DELAYS upload support for gfx10

Support {GLOBAL/SE0/SE1/SE2/SE3}_TAP_DELAYS uploading.

v2: upload TAP_DELAYS before RLC autoload was triggered. (Hawking)

Signed-off-by: Chengming Gui <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add rlc TOC header file for soc21 (v2)

Add RLC autoload TOC header file for soc21 ASIC.

v2: squash in updates

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <H

drm/amdgpu: add rlc TOC header file for soc21 (v2)

Add RLC autoload TOC header file for soc21 ASIC.

v2: squash in updates

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: support rlc v2_3 ucode struct

Add support for rlc v2_3 to support RLCV and RLCP fw load.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Kenneth Feng <[email protected]>
Si

drm/amdgpu: support rlc v2_3 ucode struct

Add support for rlc v2_3 to support RLCV and RLCP fw load.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Kenneth Feng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: retire rlc callbacks sriov_rreg/wreg

Not needed anymore.

Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Zhou, Peng Ju <[email protected]>
Acked-by: Christian König

drm/amdgpu: retire rlc callbacks sriov_rreg/wreg

Not needed anymore.

Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Zhou, Peng Ju <[email protected]>
Acked-by: Christian König <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add structures for rlcg indirect reg access

Add structures that are used to cache registers offsets
for rlcg indirect reg access ctrl and flag availability
of such interface

Signed-off-

drm/amdgpu: add structures for rlcg indirect reg access

Add structures that are used to cache registers offsets
for rlcg indirect reg access ctrl and flag availability
of such interface

Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Zhou, Peng Ju <[email protected]>
Acked-by: Christian König <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: Change the imprecise function name

The callback functions are used for SRIOV read/write instead
of just for rlcg read/write

Signed-off-by: Roy Sun <[email protected]>
Reviewed-by: Zhou pe

drm/amdgpu: Change the imprecise function name

The callback functions are used for SRIOV read/write instead
of just for rlcg read/write

Signed-off-by: Roy Sun <[email protected]>
Reviewed-by: Zhou pengju <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: Indirect register access for Navi12 sriov

This patch series are used for GC/MMHUB(part)/IH_RB_CNTL
indirect access in the SRIOV environment.

There are 4 bits, controlled by host, to con

drm/amdgpu: Indirect register access for Navi12 sriov

This patch series are used for GC/MMHUB(part)/IH_RB_CNTL
indirect access in the SRIOV environment.

There are 4 bits, controlled by host, to control
if GC/MMHUB(part)/IH_RB_CNTL indirect access enabled.
(one bit is master bit controls other 3 bits)

For GC registers, changing all the register access from MMIO to
RLC and use RLC as the default access method in the full access time.

For partial MMHUB registers, changing their access from MMIO to
RLC in the full access time, the remaining registers
keep the original access method.

For IH_RB_CNTL register, changing it's access from MMIO to PSP.

Signed-off-by: Peng Ju Zhou <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: indirect register access for nv12 sriov

1. expand rlcg interface for gc & mmhub indirect access
2. add rlcg interface for no kiq

v2: squash in fix for gfx9 (Changfeng)

Signed-off-by: P

drm/amdgpu: indirect register access for nv12 sriov

1. expand rlcg interface for gc & mmhub indirect access
2. add rlcg interface for no kiq

v2: squash in fix for gfx9 (Changfeng)

Signed-off-by: Peng Ju Zhou <[email protected]>
Reviewed-by: Emily.Deng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add rlc iram and dram firmware support

Support to load RLC iram and dram ucode when RLC firmware struct use v2.2

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang

drm/amdgpu: add rlc iram and dram firmware support

Support to load RLC iram and dram ucode when RLC firmware struct use v2.2

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add rlc iram and dram firmware support

Support to load RLC iram and dram ucode when RLC firmware struct use v2.2

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang

drm/amdgpu: add rlc iram and dram firmware support

Support to load RLC iram and dram ucode when RLC firmware struct use v2.2

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: revise RLCG access path

what changed:
1)provide new implementation interface for the rlcg access path
2)put SQ_CMD/SQ_IND_INDEX to GFX9 RLCG path to let debugfs's reg_op
function can acc

drm/amdgpu: revise RLCG access path

what changed:
1)provide new implementation interface for the rlcg access path
2)put SQ_CMD/SQ_IND_INDEX to GFX9 RLCG path to let debugfs's reg_op
function can access reg that need RLCG path help

now even debugfs's reg_op can used to dump wave.

tested-by: Monk Liu <[email protected]>
tested-by: Zhou pengju <[email protected]>
Signed-off-by: Zhou pengju <[email protected]>
Signed-off-by: Monk Liu <[email protected]>
Reviewed-by: Emily Deng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: Initialize SPM_VMID with 0xf (v2)

SPM_VMID is a global resource, SPM access the video memory according to
SPM_VMID. The initial valude of SPM_VMID is 0 which is used by kernel.
That mean

drm/amdgpu: Initialize SPM_VMID with 0xf (v2)

SPM_VMID is a global resource, SPM access the video memory according to
SPM_VMID. The initial valude of SPM_VMID is 0 which is used by kernel.
That means UMD can overwrite the memory of VMID0 by enabling SPM, that
is really dangerous.

Initialize SPM_VMID with 0xf, it messes up other user mode process at
most.

v2: squash in indentation fix

Signed-off-by: Jacob He <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: use rlc toc from psp sos binary

Instead of putting toc into driver source code, the toc will
be part of psp_sos fw. Driver need to get and parse it from
psp fw

Signed-off-by: Hawking Zh

drm/amdgpu: use rlc toc from psp sos binary

Instead of putting toc into driver source code, the toc will
be part of psp_sos fw. Driver need to get and parse it from
psp fw

Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Le Ma <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: add structures for buffer allocate/release for rlc autoload

Allocate a visible framebuffer to store all gfxip ucodes as the format of TOC.

Signed-off-by: Le.Ma <[email protected]>
Reviewed-

drm/amdgpu: add structures for buffer allocate/release for rlc autoload

Allocate a visible framebuffer to store all gfxip ucodes as the format of TOC.

Signed-off-by: Le.Ma <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: abstract the function of enter/exit safe mode for RLC

Abstract the function of amdgpu_gfx_rlc_enter/exit_safe_mode and some part of
rlc_init to improve the reusability of RLC.

Signed-of

drm/amdgpu: abstract the function of enter/exit safe mode for RLC

Abstract the function of amdgpu_gfx_rlc_enter/exit_safe_mode and some part of
rlc_init to improve the reusability of RLC.

Signed-off-by: Likun Gao <[email protected]>
Acked-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amdgpu: separate amdgpu_rlc into a single file

Separate the function and struct of RLC from the file of GFX.
Abstract the function of amdgpu_gfx_rlc_fini.

Signed-off-by: Likun Gao <Likun.Gao@am

drm/amdgpu: separate amdgpu_rlc into a single file

Separate the function and struct of RLC from the file of GFX.
Abstract the function of amdgpu_gfx_rlc_fini.

Signed-off-by: Likun Gao <[email protected]>
Acked-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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