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Searched refs:buses (Results 1 – 25 of 141) sorted by relevance

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/linux-6.15/drivers/net/mdio/
H A Dmdio-thunder.c19 struct cavium_mdiobus *buses[4]; member
83 nexus->buses[i] = bus; in thunder_mdiobus_pci_probe()
105 if (i >= ARRAY_SIZE(nexus->buses)) in thunder_mdiobus_pci_probe()
123 for (i = 0; i < ARRAY_SIZE(nexus->buses); i++) { in thunder_mdiobus_pci_remove()
124 struct cavium_mdiobus *bus = nexus->buses[i]; in thunder_mdiobus_pci_remove()
H A DKconfig79 tristate "Bitbanged MDIO buses"
109 tristate "GPIO lib-based bitbanged MDIO buses"
160 tristate "Octeon and some ThunderX SOCs MDIO buses"
167 buses. It is required by the Octeon and ThunderX ethernet device
200 tristate "ThunderX SOCs MDIO buses"
/linux-6.15/sound/i2c/
H A Di2c.c46 list_del(&bus->buses); in snd_i2c_bus_free()
48 while (!list_empty(&bus->buses)) { in snd_i2c_bus_free()
49 slave = snd_i2c_slave_bus(bus->buses.next); in snd_i2c_bus_free()
80 INIT_LIST_HEAD(&bus->buses); in snd_i2c_bus_create()
84 list_add_tail(&bus->buses, &master->buses); in snd_i2c_bus_create()
/linux-6.15/Documentation/devicetree/bindings/interconnect/
H A Dfsl,imx8m-noc.yaml13 The i.MX SoC family has multiple buses for which clock frequency (and
16 Some of those buses expose register areas mentioned in the memory maps as GPV
20 The buses are based on externally licensed IPs such as ARM NIC-301 and
/linux-6.15/drivers/pci/
H A Dprobe.c507 u32 buses; in pci_read_bridge_windows() local
514 res.start = (buses >> 8) & 0xff; in pci_read_bridge_windows()
515 res.end = (buses >> 16) & 0xff; in pci_read_bridge_windows()
1345 u32 buses, i, j = 0; in pci_scan_bridge_extend() local
1360 primary = buses & 0xFF; in pci_scan_bridge_extend()
1391 unsigned int cmax, buses; in pci_scan_bridge_extend() local
1474 buses = (buses & 0xff000000) in pci_scan_bridge_extend()
1484 buses &= ~0xff000000; in pci_scan_bridge_extend()
3087 unsigned int buses = 0; in pci_scan_child_bus_extend() local
3096 buses = available_buses; in pci_scan_child_bus_extend()
[all …]
/linux-6.15/include/sound/
H A Di2c.h45 struct list_head buses; /* master: slave buses sharing SCK/SCL, slave: link list */ member
60 #define snd_i2c_slave_bus(n) list_entry(n, struct snd_i2c_bus, buses)
/linux-6.15/drivers/net/can/softing/
H A DKconfig8 Softing Gmbh CAN cards come with 1 or 2 physical buses.
15 controls the 2 buses on the card together.
/linux-6.15/drivers/media/v4l2-core/
H A Dv4l2-fwnode.c37 } buses[] = { variable
78 for (i = 0; i < ARRAY_SIZE(buses); i++) in get_v4l2_fwnode_bus_conv_by_fwnode_bus()
79 if (buses[i].fwnode_bus_type == type) in get_v4l2_fwnode_bus_conv_by_fwnode_bus()
80 return &buses[i]; in get_v4l2_fwnode_bus_conv_by_fwnode_bus()
108 for (i = 0; i < ARRAY_SIZE(buses); i++) in get_v4l2_fwnode_bus_conv_by_mbus()
109 if (buses[i].mbus_type == type) in get_v4l2_fwnode_bus_conv_by_mbus()
110 return &buses[i]; in get_v4l2_fwnode_bus_conv_by_mbus()
/linux-6.15/Documentation/devicetree/bindings/net/
H A Dcavium-mdio.txt35 Several mdio buses may be gathered as children of a single PCI
36 device, this PCI device is the nexus of the buses.
H A Dfsl,gianfar-mdio.yaml15 PHY is accessed through the local MDIO bus. These buses are defined similarly
16 to the mdio buses, except they are compatible with "fsl,gianfar-tbi". The TBI
H A Dbrcm,bcm6368-mdio-mux.yaml13 This MDIO bus multiplexer defines buses that could be internal as well as
/linux-6.15/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-pca954x.yaml16 The devices usually have 4 or 8 child buses, which are
82 description: Send a flush-out sequence to stuck auxiliary buses
87 description: Send a STOP condition to the auxiliary buses when the switch
/linux-6.15/Documentation/devicetree/bindings/gnss/
H A Dsirfstar.yaml20 SiRF chips can be used over UART, I2C or SPI buses.
39 The I2C Address, SPI chip select address. Not required on UART buses.
/linux-6.15/drivers/pci/hotplug/
H A Dacpiphp_glue.c193 u32 buses; in acpiphp_post_dock_fixup() local
205 pci_read_config_dword(bus->self, PCI_PRIMARY_BUS, &buses); in acpiphp_post_dock_fixup()
207 if (((buses >> 8) & 0xff) != bus->busn_res.start) { in acpiphp_post_dock_fixup()
208 buses = (buses & 0xff000000) in acpiphp_post_dock_fixup()
212 pci_write_config_dword(bus->self, PCI_PRIMARY_BUS, buses); in acpiphp_post_dock_fixup()
H A Dibmphp_ebda.c67 struct ebda_hpc_bus *buses; in alloc_ebda_hpc() local
78 buses = kcalloc(bus_count, sizeof(struct ebda_hpc_bus), GFP_KERNEL); in alloc_ebda_hpc()
79 if (!buses) in alloc_ebda_hpc()
81 controller->buses = buses; in alloc_ebda_hpc()
95 kfree(controller->buses); in free_ebda_hpc()
205 …debug("%s - bus# of each bus controlled by this ctlr: %x\n", __func__, hpc_ptr->buses[index].bus_n… in print_ebda_hpc()
772 bus_ptr = hpc_ptr->buses; in ebda_rsrc_controller()
/linux-6.15/Documentation/driver-api/hte/
H A Dhte.rst13 monitor sets of system signals, lines, buses etc... in realtime for state
67 lines, GPIO, chip signals, buses etc...
/linux-6.15/drivers/ipack/
H A DKconfig13 hosted on these buses. While IndustryPack modules can provide a
/linux-6.15/drivers/net/wireless/silabs/wfx/
H A DKconfig9 chipsets. This chip can be found on SPI or SDIO buses.
/linux-6.15/Documentation/ABI/removed/
H A Draw13946 access to FireWire buses. Its major drawbacks were its inability
/linux-6.15/Documentation/devicetree/bindings/powerpc/4xx/
H A Dhsta.txt6 between the plb4 and plb6 system buses to provide high speed data
/linux-6.15/Documentation/driver-api/media/
H A Dv4l2-intro.rst14 more I2C buses, but other buses can also be used. Such devices are
/linux-6.15/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,aips-bus.yaml15 buses.
/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dmarvell,pxa1928.txt5 blocks called APMU, MPMU, and APBC roughly corresponding to internal buses.
H A Dmarvell,pxa1908.yaml16 and APMU roughly corresponding to internal buses.
/linux-6.15/Documentation/mhi/
H A Dmhi.rst14 speed peripheral buses or shared memory. Even though MHI can be easily adapted
15 to any peripheral buses, it is primarily used with PCIe based devices. MHI
16 provides logical channels over the physical buses and allows transporting the
29 which are mapped to the host memory space by the peripheral buses like PCIe.

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