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Searched refs:amdgpu_ras_is_supported (Results 1 – 25 of 32) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dhdp_v4_0.c80 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP)) in hdp_v4_0_query_ras_error_count()
89 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP)) in hdp_v4_0_reset_ras_error_count()
H A Damdgpu_nbio.c63 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_nbio_ras_late_init()
H A Dsdma_v4_4.c242 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { in sdma_v4_4_reset_ras_error_count()
H A Dgfx_v9_4.c873 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_query_ras_error_count()
911 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_reset_ras_error_count()
981 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_query_ras_error_status()
H A Dgfx_v9_4_2.c706 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_2_do_edc_gpr_workarounds()
1651 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_2_query_ras_error_count()
1696 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_2_reset_ras_error_count()
1759 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_2_query_ras_error_status()
1769 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in gfx_v9_4_2_reset_ras_error_status()
H A Dmmhub_v1_8.c692 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) { in mmhub_v1_8_query_ras_error_count()
720 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) { in mmhub_v1_8_reset_ras_error_count()
H A Djpeg_v4_0_3.c195 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG)) { in jpeg_v4_0_3_sw_init()
1276 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG)) { in jpeg_v4_0_3_query_ras_error_count()
1298 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG)) { in jpeg_v4_0_3_reset_ras_error_count()
H A Dmmhub_v1_7.c1296 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) { in mmhub_v1_7_reset_ras_error_count()
1316 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) in mmhub_v1_7_query_ras_error_status()
1336 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) in mmhub_v1_7_reset_ras_error_status()
H A Dsdma_v4_4_2.c1565 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { in sdma_v4_4_2_hw_fini()
1817 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA))
2410 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { in sdma_v4_4_2_xcp_suspend()
2492 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { in sdma_v4_4_2_query_ras_error_count()
2517 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { in sdma_v4_4_2_reset_ras_error_count()
H A Dvcn_v4_0_3.c222 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) { in vcn_v4_0_3_sw_init()
1914 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) { in vcn_v4_0_3_query_ras_error_count()
1936 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) { in vcn_v4_0_3_reset_ras_error_count()
2053 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) in vcn_v4_0_3_enable_ras()
H A Damdgpu_ras.c505 if (!amdgpu_ras_is_supported(adev, data.head.block)) in amdgpu_ras_debugfs_ctrl_write()
1497 if (!amdgpu_ras_is_supported(adev, block) || in amdgpu_ras_reset_error_count()
2052 if (amdgpu_ras_is_supported(adev, obj->head.block) && in amdgpu_ras_debugfs_create_all()
4090 if (!amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_ras_block_late_init()
4208 if (!amdgpu_ras_is_supported(adev, obj->head.block)) { in amdgpu_ras_resume()
4267 if (!amdgpu_ras_is_supported(adev, obj->ras_comm.block)) in amdgpu_ras_late_init()
4312 if (amdgpu_ras_is_supported(adev, obj->ras_comm.block) && in amdgpu_ras_fini()
4641 int amdgpu_ras_is_supported(struct amdgpu_device *adev, in amdgpu_ras_is_supported() function
H A Damdgpu_umc.c325 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_umc_ras_late_init()
H A Damdgpu_jpeg.c293 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_jpeg_ras_late_init()
H A Damdgpu_sdma.c108 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_sdma_ras_late_init()
H A Damdgpu_ras.h905 int amdgpu_ras_is_supported(struct amdgpu_device *adev, unsigned int block);
H A Djpeg_v2_5.c249 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG)) in jpeg_v2_5_hw_fini()
H A Djpeg_v4_0.c227 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG)) in jpeg_v4_0_hw_fini()
H A Dsdma_v4_0.c1975 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { in sdma_v4_0_hw_fini()
2116 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) in sdma_v4_0_process_ras_data_cb()
2705 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { in sdma_v4_0_reset_ras_error_count()
H A Dgmc_v12_0.c942 amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC)) in gmc_v12_0_hw_fini()
H A Dgmc_v11_0.c974 amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC)) in gmc_v11_0_hw_fini()
H A Dmmhub_v9_4.c1657 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) { in mmhub_v9_4_reset_ras_error_count()
1679 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) in mmhub_v9_4_query_ras_error_status()
H A Dgmc_v10_0.c1053 amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC)) in gmc_v10_0_hw_fini()
H A Dmmhub_v1_0.c823 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB)) { in mmhub_v1_0_reset_ras_error_count()
H A Damdgpu_gfx.c923 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_gfx_ras_late_init()
1006 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) { in amdgpu_gfx_process_ras_data_cb()
H A Dvcn_v4_0.c396 if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) in vcn_v4_0_hw_fini()
982 if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) in vcn_v4_0_enable_ras()

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