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Searched refs:WR_CONFIRM (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dvid.h151 #define WR_CONFIRM (1 << 20) macro
H A Dcikd.h278 #define WR_CONFIRM (1 << 20) macro
H A Dsoc15d.h139 #define WR_CONFIRM (1 << 20) macro
H A Dnvd.h116 #define WR_CONFIRM (1 << 20) macro
H A Dgfx_v9_4_3.c377 (wc ? WR_CONFIRM : 0)); in gfx_v9_4_3_write_data_to_reg()
470 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_4_3_ring_test_ib()
2928 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
2937 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
2972 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_4_3_ring_emit_wreg()
2978 cmd = WR_CONFIRM; in gfx_v9_4_3_ring_emit_wreg()
H A Dgfx_v11_0.c482 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v11_0_write_data_to_reg()
613 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v11_0_ring_test_ib()
5837 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
5846 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
5942 amdgpu_ring_write(ring, WRITE_DATA_DST_SEL(5) | WR_CONFIRM); in gfx_v11_0_ring_emit_gfx_shadow()
6069 WR_CONFIRM) | in gfx_v11_0_ring_emit_de_meta()
6115 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v11_0_ring_emit_wreg()
6121 cmd = WR_CONFIRM; in gfx_v11_0_ring_emit_wreg()
H A Dgfx_v9_0.c1139 (wc ? WR_CONFIRM : 0)); in gfx_v9_0_write_data_to_reg()
1221 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()
5643 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5652 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5692 WR_CONFIRM) | in gfx_v9_0_ring_emit_ce_meta()
5805 WR_CONFIRM) | in gfx_v9_0_ring_emit_de_meta()
5900 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
5906 cmd = WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
H A Dgfx_v8_0.c892 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()
6256 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6265 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6351 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
6357 cmd = WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
7233 WR_CONFIRM) | in gfx_v8_0_ring_emit_ce_meta()
7266 WR_CONFIRM) | in gfx_v8_0_ring_emit_de_meta()
H A Dgfx_v12_0.c508 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v12_0_ring_test_ib()
4439 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v12_0_ring_emit_fence_kiq()
4448 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v12_0_ring_emit_fence_kiq()
4577 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v12_0_ring_emit_wreg()
4583 cmd = WR_CONFIRM; in gfx_v12_0_ring_emit_wreg()
H A Dsid.h1418 #define WR_CONFIRM (1 << 20) macro
H A Dgfx_v10_0.c3976 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v10_0_write_data_to_reg()
4069 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v10_0_ring_test_ib()
8756 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
8765 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
8893 WR_CONFIRM) | in gfx_v10_0_ring_emit_ce_meta()
8929 WR_CONFIRM) | in gfx_v10_0_ring_emit_de_meta()
8975 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
8981 cmd = WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
/linux-6.15/drivers/gpu/drm/radeon/
H A Dsid.h1646 #define WR_CONFIRM (1 << 20) macro
H A Dcikd.h1737 #define WR_CONFIRM (1 << 20) macro