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Searched refs:PACKET3_WRITE_DATA (Results 1 – 19 of 19) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h192 #define PACKET3_WRITE_DATA 0x37 macro
H A Dvid.h141 #define PACKET3_WRITE_DATA 0x37 macro
H A Dcikd.h268 #define PACKET3_WRITE_DATA 0x37 macro
H A Dsoc15d.h129 #define PACKET3_WRITE_DATA 0x37 macro
H A Dnvd.h106 #define PACKET3_WRITE_DATA 0x37 macro
H A Dgfx_v8_0.c891 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v8_0_ring_test_ib()
5144 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
5152 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
5160 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
5168 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
6254 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_fence_kiq()
6263 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_fence_kiq()
6361 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_wreg()
7230 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce)); in gfx_v8_0_ring_emit_ce_meta()
7263 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_de)); in gfx_v8_0_ring_emit_de_meta()
H A Dgfx_v7_0.c3181 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_wreg()
4011 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
4019 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
4027 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
4035 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
H A Dgfx_v9_4_3.c374 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_write_data_to_reg()
469 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v9_4_3_ring_test_ib()
2926 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_ring_emit_fence_kiq()
2935 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_ring_emit_fence_kiq()
2981 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_ring_emit_wreg()
H A Dgfx_v11_0.c480 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_write_data_to_reg()
612 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v11_0_ring_test_ib()
5835 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_ring_emit_fence_kiq()
5844 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_ring_emit_fence_kiq()
5941 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_ring_emit_gfx_shadow()
6066 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v11_0_ring_emit_de_meta()
6124 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_ring_emit_wreg()
H A Dgfx_v9_0.c1136 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_write_data_to_reg()
1220 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v9_0_ring_test_ib()
5641 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_fence_kiq()
5650 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_fence_kiq()
5689 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v9_0_ring_emit_ce_meta()
5802 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v9_0_ring_emit_de_meta()
5909 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_wreg()
H A Dsid.h1408 #define PACKET3_WRITE_DATA 0x37 macro
H A Dgfx_v12_0.c507 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v12_0_ring_test_ib()
4437 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v12_0_ring_emit_fence_kiq()
4446 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v12_0_ring_emit_fence_kiq()
4586 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v12_0_ring_emit_wreg()
H A Dgfx_v10_0.c3974 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_write_data_to_reg()
4068 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v10_0_ring_test_ib()
8754 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_fence_kiq()
8763 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_fence_kiq()
8890 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v10_0_ring_emit_ce_meta()
8926 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v10_0_ring_emit_de_meta()
8984 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_wreg()
H A Dgfx_v6_0.c2339 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v6_0_ring_emit_wreg()
/linux-6.15/drivers/gpu/drm/radeon/
H A Dsi.c3402 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_ring_ib_execute()
4572 case PACKET3_WRITE_DATA: in si_vm_packet3_gfx_check()
4675 case PACKET3_WRITE_DATA: in si_vm_packet3_compute_check()
5060 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_vm_flush()
5075 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_vm_flush()
5083 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_vm_flush()
H A Dnid.h1191 #define PACKET3_WRITE_DATA 0x37 macro
H A Dsid.h1636 #define PACKET3_WRITE_DATA 0x37 macro
H A Dcik.c3741 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_ring_ib_execute()
5682 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
5696 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
5703 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6)); in cik_vm_flush()
5714 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
5725 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
H A Dcikd.h1727 #define PACKET3_WRITE_DATA 0x37 macro