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Searched refs:PACKET3_WAIT_REG_MEM (Results 1 – 24 of 24) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h197 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dvid.h168 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dcikd.h296 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dsoc15d.h177 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dnvd.h166 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dgfx_v7_0.c2085 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v7_0_ring_emit_hdp_flush()
3109 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v7_0_ring_emit_pipeline_sync()
3152 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v7_0_ring_emit_vm_flush()
4934 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v7_0_wait_reg_mem()
H A Dsid.h1428 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dgfx_v8_0.c6042 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v8_0_ring_emit_hdp_flush()
6175 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v8_0_ring_emit_pipeline_sync()
6194 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v8_0_ring_emit_vm_flush()
6373 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v8_0_wait_reg_mem()
H A Dgfx_v6_0.c2285 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v6_0_ring_emit_pipeline_sync()
2312 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v6_0_ring_emit_vm_flush()
H A Dgfx_v9_4_3.c394 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v9_4_3_wait_reg_mem()
H A Dgfx_v12_0.c402 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v12_0_wait_reg_mem()
H A Dgfx_v11_0.c493 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v11_0_wait_reg_mem()
H A Dgfx_v9_0.c1150 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v9_0_wait_reg_mem()
H A Dgfx_v10_0.c3987 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v10_0_wait_reg_mem()
/linux-6.15/drivers/gpu/drm/radeon/
H A Dnid.h1194 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dsid.h1656 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dr600_cs.c843 wait_reg_mem.opcode != PACKET3_WAIT_REG_MEM) { in r600_cs_common_vline_parse()
1751 case PACKET3_WAIT_REG_MEM: in r600_packet3_check()
H A Dcikd.h1755 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dsi.c4549 case PACKET3_WAIT_REG_MEM: in si_vm_packet3_gfx_check()
4652 case PACKET3_WAIT_REG_MEM: in si_vm_packet3_compute_check()
5091 radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in si_vm_flush()
H A Devergreen_cs.c2087 case PACKET3_WAIT_REG_MEM: in evergreen_packet3_check()
3390 case PACKET3_WAIT_REG_MEM: in evergreen_vm_packet3_check()
H A Devergreend.h1578 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dr600d.h1615 #define PACKET3_WAIT_REG_MEM 0x3C macro
H A Dni.c2678 radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in cayman_vm_flush()
H A Dcik.c3520 radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in cik_hdp_flush_cp_ring_emit()
5733 radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in cik_vm_flush()