Home
last modified time | relevance | path

Searched refs:PACKET3_SET_SH_REG (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h255 #define PACKET3_SET_SH_REG 0x76 macro
H A Dvid.h347 #define PACKET3_SET_SH_REG 0x76 macro
H A Dcikd.h474 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsoc15d.h435 #define PACKET3_SET_SH_REG 0x76 macro
H A Dnvd.h525 #define PACKET3_SET_SH_REG 0x76 macro
H A Dgfx_v9_4_2.c381 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_4_2_run_shader()
389 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_4_2_run_shader()
396 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 3); in gfx_v9_4_2_run_shader()
H A Dgfx_v8_0.c1556 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1562 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1582 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1588 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1608 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1614 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
H A Dgfx_v9_0.c4668 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_0_do_edc_gpr_workarounds()
4675 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_0_do_edc_gpr_workarounds()
4696 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_0_do_edc_gpr_workarounds()
4703 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_0_do_edc_gpr_workarounds()
4724 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_0_do_edc_gpr_workarounds()
4731 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_0_do_edc_gpr_workarounds()
H A Dsid.h1562 #define PACKET3_SET_SH_REG 0x76 macro
/linux-6.15/drivers/gpu/drm/radeon/
H A Dsid.h1790 #define PACKET3_SET_SH_REG 0x76 macro
H A Dcikd.h1932 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsi.c4558 case PACKET3_SET_SH_REG: in si_vm_packet3_gfx_check()
4661 case PACKET3_SET_SH_REG: in si_vm_packet3_compute_check()