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Searched refs:PACKET3_PREAMBLE_CNTL (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h240 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dvid.h268 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dcikd.h395 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dsoc15d.h343 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dnvd.h394 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dgfx_v6_0.c2031 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v6_0_cp_gfx_start()
2046 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v6_0_cp_gfx_start()
2863 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v6_0_get_csb_buffer()
2887 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v6_0_get_csb_buffer()
H A Dgfx_v7_0.c2484 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v7_0_cp_gfx_start()
2508 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v7_0_cp_gfx_start()
3894 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v7_0_get_csb_buffer()
3941 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v7_0_get_csb_buffer()
H A Dsid.h1547 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dgfx_v8_0.c1235 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v8_0_get_csb_buffer()
1263 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v8_0_get_csb_buffer()
4173 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v8_0_cp_gfx_start()
4199 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v8_0_cp_gfx_start()
H A Dgfx_v11_0.c846 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v11_0_get_csb_buffer()
874 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v11_0_get_csb_buffer()
3542 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v11_0_cp_gfx_start()
3569 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v11_0_cp_gfx_start()
H A Dgfx_v9_0.c1636 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_get_csb_buffer()
1658 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_get_csb_buffer()
3321 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_cp_gfx_start()
3342 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_cp_gfx_start()
H A Dgfx_v10_0.c4309 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_get_csb_buffer()
4337 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_get_csb_buffer()
6347 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_cp_gfx_start()
6374 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_cp_gfx_start()
/linux-6.15/drivers/gpu/drm/radeon/
H A Dnid.h1261 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dni.c1552 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cayman_cp_start()
1558 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cayman_cp_start()
H A Dsid.h1775 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dcikd.h1853 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dsi.c3572 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in si_cp_start()
3578 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in si_cp_start()
5706 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in si_get_csb_buffer()
5748 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in si_get_csb_buffer()
H A Devergreend.h1656 #define PACKET3_PREAMBLE_CNTL 0x4A macro
H A Dcik.c3996 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cik_cp_gfx_start()
4006 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cik_cp_gfx_start()
6710 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cik_get_csb_buffer()
6757 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in cik_get_csb_buffer()
H A Devergreen.c3026 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in evergreen_cp_start()
3032 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in evergreen_cp_start()