| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | si_enums.h | 180 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | vid.h | 131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | cikd.h | 258 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | soc15d.h | 119 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | nvd.h | 94 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | sid.h | 1396 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | gfx_v7_0.c | 2281 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2487 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
3897 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_get_csb_buffer()
|
| H A D | gfx_v6_0.c | 2865 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_0_get_csb_buffer()
2954 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_ring_emit_cntxcntl()
|
| H A D | gfx_v8_0.c | 1238 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_get_csb_buffer()
4176 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
6306 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_ring_emit_cntxcntl()
|
| H A D | gfx_v11_0.c | 849 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_get_csb_buffer()
3545 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_cp_gfx_start()
5868 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v11_0_ring_emit_cntxcntl()
|
| H A D | gfx_v9_0.c | 1639 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
3324 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
5856 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
|
| H A D | gfx_v10_0.c | 4312 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_get_csb_buffer()
6350 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_cp_gfx_start()
8807 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_ring_emit_cntxcntl()
|
| H A D | gfx_v12_0.c | 4470 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v12_0_ring_emit_cntxcntl()
|
| /linux-6.15/drivers/gpu/drm/radeon/ |
| H A D | nid.h | 1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | sid.h | 1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | cikd.h | 1717 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | si.c | 4537 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_gfx_check()
4650 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_compute_check()
5709 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in si_get_csb_buffer()
|
| H A D | evergreen_cs.c | 1828 case PACKET3_CONTEXT_CONTROL: in evergreen_packet3_check()
3378 case PACKET3_CONTEXT_CONTROL: in evergreen_vm_packet3_check()
|
| H A D | evergreend.h | 1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | r600d.h | 1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
|
| H A D | r600_cs.c | 1688 case PACKET3_CONTEXT_CONTROL: in r600_packet3_check()
|
| H A D | cik.c | 3999 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_cp_gfx_start()
6713 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_get_csb_buffer()
|