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Searched refs:PACKET3_CLEAR_STATE (Results 1 – 21 of 21) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h163 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dvid.h116 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dcikd.h243 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dsoc15d.h90 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dnvd.h59 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dsid.h1379 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dgfx_v6_0.c2049 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v6_0_cp_gfx_start()
2890 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v6_0_get_csb_buffer()
H A Dgfx_v7_0.c2511 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v7_0_cp_gfx_start()
3944 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v7_0_get_csb_buffer()
H A Dgfx_v11_0.c877 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v11_0_get_csb_buffer()
3572 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v11_0_cp_gfx_start()
3587 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v11_0_cp_gfx_start()
H A Dgfx_v8_0.c1266 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v8_0_get_csb_buffer()
4202 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v8_0_cp_gfx_start()
H A Dgfx_v9_0.c1661 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v9_0_get_csb_buffer()
3345 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v9_0_cp_gfx_start()
H A Dgfx_v10_0.c4340 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v10_0_get_csb_buffer()
6377 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v10_0_cp_gfx_start()
6397 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v10_0_cp_gfx_start()
/linux-6.15/drivers/gpu/drm/radeon/
H A Dnid.h1164 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dsi.c3582 radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in si_cp_start()
3601 radeon_ring_write(ring, PACKET3_COMPUTE(PACKET3_CLEAR_STATE, 0)); in si_cp_start()
4521 case PACKET3_CLEAR_STATE: in si_vm_packet3_gfx_check()
4639 case PACKET3_CLEAR_STATE: in si_vm_packet3_compute_check()
5751 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in si_get_csb_buffer()
H A Dsid.h1607 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dcikd.h1702 #define PACKET3_CLEAR_STATE 0x12 macro
H A Devergreen_cs.c1836 case PACKET3_CLEAR_STATE: in evergreen_packet3_check()
3366 case PACKET3_CLEAR_STATE: in evergreen_vm_packet3_check()
H A Devergreend.h1550 #define PACKET3_CLEAR_STATE 0x12 macro
H A Dni.c1562 radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in cayman_cp_start()
H A Dcik.c4010 radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in cik_cp_gfx_start()
6760 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in cik_get_csb_buffer()
H A Devergreen.c3036 radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in evergreen_cp_start()