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Searched refs:Mask (Results 1 – 25 of 66) sorted by relevance

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/linux-6.15/Documentation/devicetree/bindings/regulator/
H A Dti-abb-regulator.txt25 - ti,tranxdone-status-mask: Mask to the int-register to write-to-clear mask
36 RBB enable efuse Mask: (See Optional properties)
37 FBB enable efuse Mask: (See Optional properties)
38 Vset value efuse Mask: (See Optional properties)
58 RBB enable efuse Mask: Optional if 'efuse-address' register is defined.
61 FBB enable efuse Mask: Optional if 'efuse-address' register is defined.
65 Vset value efuse Mask: Mandatory if ldo-address is set. Picks up from
/linux-6.15/drivers/video/fbdev/via/
H A Dvt1636.c60 data = (data & (~io_data.Mask)) | io_data.Data; in viafb_gpio_i2c_write_mask_lvds()
163 io_data.Mask = 0x1F; in set_dpa_vt1636()
169 io_data.Mask = 0x0F; in set_dpa_vt1636()
H A Dhw.h604 u8 Mask; member
/linux-6.15/Documentation/devicetree/bindings/mtd/
H A Dti,davinci-nand.yaml38 Mask for ALE. Needed for executing address phase. These offset will be
46 Mask for CLE. Needed for executing command phase. These offset will be
54 Mask for chipselect address. Needed to mask addresses for given
/linux-6.15/Documentation/scsi/
H A Dhptiop.rst29 0x28 Inbound Interrupt Mask Register
31 0x34 Outbound Interrupt Mask Register
47 0x28 Inbound Interrupt Mask Register
49 0x34 Outbound Interrupt Mask Register
60 0x20404 Inbound Interrupt Mask Register
62 0x2040C Outbound Interrupt Mask Register
/linux-6.15/Documentation/sound/designs/
H A Dcontrol-names.rst135 IEC958 [...] [Playback|Capture] Mask consumer and professional mask
136 IEC958 [...] [Playback|Capture] Con Mask consumer mask
137 IEC958 [...] [Playback|Capture] Pro Mask professional mask
/linux-6.15/Documentation/sound/cards/
H A Dimg-spdif-in.rst8 * name='IEC958 Capture Mask',index=0
16 is being received. The 'IEC958 Capture Mask' shows which bits can be read
/linux-6.15/Documentation/ABI/testing/
H A Dsysfs-class-net-queues6 Mask of the CPU(s) currently enabled to participate into the
40 Mask of the CPU(s) currently enabled to participate into the
50 Mask of the receive queue(s) currently enabled to participate
H A Dsysfs-driver-pciback9 Device.Function-Register:Size:Mask (Domain is optional).
/linux-6.15/Documentation/gpu/amdgpu/display/
H A Dtrace-groups-table.csv1 Name, Mask Value
/linux-6.15/arch/arm/mm/
H A Dabort-macro.S18 and \tmp, \tmp, # 0xfe00 @ Mask opcode field
H A Dproc-v7m.S253 .long 0x000f0000 @ Mask for ID
/linux-6.15/fs/afs/
H A Dafs_vl.h107 __be32 Mask; member
/linux-6.15/Documentation/networking/devlink/
H A Ddevlink-selftests.rst9 Tests Mask
H A Ddevlink-flash.rst19 Overwrite Mask
/linux-6.15/Documentation/userspace-api/media/rc/
H A Dlirc-set-transmitter-mask.rst29 Mask with channels to enable tx. Channel 0 is the least significant bit.
/linux-6.15/arch/alpha/lib/
H A Dev6-memset.S209 mskqh $7,$6,$2 # U : Mask final quad
387 mskqh $7,$6,$2 # U : Mask final quad
575 mskqh $7,$6,$2 # U : Mask final quad
/linux-6.15/Documentation/devicetree/bindings/bus/
H A Dti-sysc.yaml140 description: Mask of supported register bits for the SYSCONFIG register
152 description: Mask of supported register bits for the SYSSTATUS register
/linux-6.15/Documentation/devicetree/bindings/ata/
H A Dahci-common.yaml72 Mask that indicates which ports the HBA supports. Useful if PI is not
/linux-6.15/Documentation/devicetree/bindings/hwmon/
H A Dti,ina2xx.yaml72 of Mask/Enable register. Default value is Normal (0 which maps to
/linux-6.15/Documentation/virt/kvm/arm/
H A Dhyp-abi.rst57 Mask all exceptions, disable the MMU, clear I+D bits, move the arguments
/linux-6.15/Documentation/driver-api/rapidio/
H A Dtsi721.rst59 messaging MBOXes are managed by this device driver. Mask bits 0 - 3
/linux-6.15/arch/arm/mach-omap1/
H A Dams-delta-fiq-handler.S160 @ Mask other GPIO line interrupts till key done
/linux-6.15/Documentation/devicetree/bindings/input/
H A Dsyna,rmi4.yaml155 Mask for disabling posiiton reporting. Used to disable reporing
/linux-6.15/Documentation/userspace-api/media/v4l/
H A Ddev-rds.rst144 - Mask for bits 0-2 to get the block ID.

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