| /linux-6.15/arch/alpha/kernel/ |
| H A D | setup.c | 1196 int L1I, L1D, L2, L3; in determine_cpu_caches() local
1203 L1I = CSHAPE(8*1024, 5, 1); in determine_cpu_caches()
1205 L1I = CSHAPE(16*1024, 5, 1); in determine_cpu_caches()
1206 L1D = L1I; in determine_cpu_caches()
1227 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches()
1242 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches()
1267 L1I = CSHAPE(16*1024, 6, 1); in determine_cpu_caches()
1270 L1I = CSHAPE(32*1024, 6, 2); in determine_cpu_caches()
1294 L1I = L1D = CSHAPE(64*1024, 6, 2); in determine_cpu_caches()
1308 L1I = L1D = L2 = L3 = 0; in determine_cpu_caches()
[all …]
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| /linux-6.15/drivers/perf/ |
| H A D | arm_v7_pmu.c | 183 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
232 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
271 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
272 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
321 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
322 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
371 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
420 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL,
476 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = KRAIT_PERFCTR_L1_ICACHE_MISS,
515 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_ICACHE_ACCESS,
[all …]
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| H A D | riscv_pmu_sbi.c | 179 [C(L1I)] = {
182 C(OP_READ), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
184 C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
188 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
190 C(OP_WRITE), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
194 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
196 C(OP_PREFETCH), C(L1I), SBI_PMU_EVENT_TYPE_CACHE, 0}},
|
| H A D | arm_pmuv3.c | 63 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE,
64 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL,
128 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_ACCESS,
129 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_MISS,
|
| H A D | arm_v6_pmu.c | 100 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS,
|
| /linux-6.15/arch/powerpc/perf/ |
| H A D | e6500-pmu.c | 42 [C(L1I)] = {
|
| H A D | e500-pmu.c | 44 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | power10-pmu.c | 373 [C(L1I)] = {
474 [C(L1I)] = {
|
| H A D | mpc7450-pmu.c | 371 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | generic-compat-pmu.c | 200 [ C(L1I) ] = {
|
| H A D | power8-pmu.c | 281 [ C(L1I) ] = {
|
| H A D | power7-pmu.c | 345 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | ppc970-pmu.c | 444 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | power9-pmu.c | 352 [ C(L1I) ] = {
|
| H A D | power6-pmu.c | 505 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| H A D | power5-pmu.c | 573 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
| /linux-6.15/arch/mips/kernel/ |
| H A D | perf_event_mipsxx.c | 1026 [C(L1I)] = {
1107 [C(L1I)] = {
1176 [C(L1I)] = {
1220 [C(L1I)] = {
1276 [C(L1I)] = {
1340 [C(L1I)] = {
1393 [C(L1I)] = {
1444 [C(L1I)] = {
|
| /linux-6.15/arch/sh/kernel/cpu/sh4/ |
| H A D | perf_event.c | 106 [ C(L1I) ] = {
|
| /linux-6.15/arch/sh/kernel/cpu/sh4a/ |
| H A D | perf_event.c | 131 [ C(L1I) ] = {
|
| /linux-6.15/arch/x86/events/intel/ |
| H A D | p6.c | 44 [ C(L1I ) ] = {
|
| H A D | knc.c | 45 [ C(L1I ) ] = {
|
| /linux-6.15/arch/x86/events/zhaoxin/ |
| H A D | core.c | 65 [C(L1I)] = {
169 [C(L1I)] = {
|
| /linux-6.15/arch/sparc/kernel/ |
| H A D | perf_event.c | 235 [C(L1I)] = {
373 [C(L1I)] = {
508 [C(L1I)] = {
645 [C(L1I)] = {
|
| /linux-6.15/arch/xtensa/kernel/ |
| H A D | perf_event.c | 93 [C(L1I)] = {
|
| /linux-6.15/arch/x86/events/amd/ |
| H A D | core.c | 45 [ C(L1I ) ] = {
149 [C(L1I)] = {
|