Searched refs:KVM_REG_SIZE_MASK (Results 1 – 15 of 15) sorted by relevance
265 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_sbi_ext()302 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_sbi_ext()341 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_sbi()370 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_sbi()
85 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_fp()130 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_fp()
145 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_vector()171 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_vector()
238 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_config()287 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_config()392 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_core()425 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_core()529 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_csr()571 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_csr()715 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_isa_ext()754 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_isa_ext()
166 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_timer()206 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_timer()
740 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { in kvm_mips_get_reg()744 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { in kvm_mips_get_reg()749 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { in kvm_mips_get_reg()767 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { in kvm_mips_set_reg()772 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { in kvm_mips_set_reg()779 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { in kvm_mips_set_reg()
112 #define REG_MASK (KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_COPROC_MASK)203 switch (id & KVM_REG_SIZE_MASK) { in print_reg()233 prefix, (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id); in print_reg()
35 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
73 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE); in core_reg_offset_from_id()769 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32) in kvm_arm_get_reg()789 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32) in kvm_arm_set_reg()
4776 switch (id & KVM_REG_SIZE_MASK) { in index_to_params()4779 if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK in index_to_params()4842 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_get()4867 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_set()
13 #define REG_MASK (KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK)632 switch (id & KVM_REG_SIZE_MASK) { in print_reg()644 (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id & ~REG_MASK); in print_reg()
1069 #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL macro1072 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
826 u64 v, size = reg->id & KVM_REG_SIZE_MASK; in kvm_get_reg()930 u64 v, size = reg->id & KVM_REG_SIZE_MASK; in kvm_set_reg()
406 (1ul << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))