Searched refs:KVM_REG_RISCV_CONFIG (Results 1 – 4 of 4) sorted by relevance
198 __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CONFIG); in config_id_to_str()200 assert((id & KVM_REG_RISCV_TYPE_MASK) == KVM_REG_RISCV_CONFIG); in config_id_to_str()649 case KVM_REG_RISCV_CONFIG: in print_reg()697 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(isa),698 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(mvendorid),699 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(marchid),700 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(mimpid),701 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(satp_mode),778 …KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicbom_block_…783 …KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicboz_block_…
239 KVM_REG_RISCV_CONFIG); in kvm_riscv_vcpu_get_reg_config()288 KVM_REG_RISCV_CONFIG); in kvm_riscv_vcpu_set_reg_config()803 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_CONFIG | i; in copy_config_reg_indices()1240 case KVM_REG_RISCV_CONFIG: in kvm_riscv_vcpu_set_reg()1273 case KVM_REG_RISCV_CONFIG: in kvm_riscv_vcpu_get_reg()
26 #define RISCV_CONFIG_REG(name) __kvm_reg_id(KVM_REG_RISCV_CONFIG, 0, \
227 #define KVM_REG_RISCV_CONFIG (0x01 << KVM_REG_RISCV_TYPE_SHIFT) macro