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Searched refs:HDMI_ACR_PACKET_CONTROL (Results 1 – 17 of 17) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h76 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
179 SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\
180 SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\
181 SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUDIO_PRIORITY, mask_sh),\
677 uint32_t HDMI_ACR_PACKET_CONTROL; member
H A Ddce_stream_encoder.c1282 REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL, in dce110_se_setup_hdmi_audio()
/linux-6.15/drivers/gpu/drm/radeon/
H A Devergreen_hdmi.c82 WREG32(HDMI_ACR_PACKET_CONTROL + offset, in evergreen_hdmi_update_acr()
85 WREG32(HDMI_ACR_PACKET_CONTROL + offset, in evergreen_hdmi_update_acr()
H A Drv770d.h693 #define HDMI_ACR_PACKET_CONTROL 0x740c macro
H A Devergreend.h538 #define HDMI_ACR_PACKET_CONTROL 0x703c macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn10/
H A Ddcn10_stream_encoder.h67 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
160 uint32_t HDMI_ACR_PACKET_CONTROL; member
H A Ddcn10_stream_encoder.c1268 REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL, in enc1_se_setup_hdmi_audio()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.h101 SRI_ARR(HDMI_ACR_PACKET_CONTROL, DIG, id),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn314/
H A Ddcn314_dio_stream_encoder.h70 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn35/
H A Ddcn35_dio_stream_encoder.h68 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn30/
H A Ddcn30_dio_stream_encoder.h69 SRI(HDMI_ACR_PACKET_CONTROL, DIG, id),\
H A Ddcn30_dio_stream_encoder.c774 REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL, in enc3_se_setup_hdmi_audio()
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v10_0.c1673 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 0); in dce_v10_0_afmt_setmode()
1676 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 1); in dce_v10_0_afmt_setmode()
1678 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1); in dce_v10_0_afmt_setmode()
H A Ddce_v11_0.c1722 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 0); in dce_v11_0_afmt_setmode()
1725 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 1); in dce_v11_0_afmt_setmode()
1727 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1); in dce_v11_0_afmt_setmode()
H A Ddce_v6_0.c1488 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, 1); in dce_v6_0_audio_set_acr()
1489 tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, in dce_v6_0_audio_set_acr()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h194 SRI_ARR(HDMI_ACR_PACKET_CONTROL, DIG, id), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h279 SRI_ARR(HDMI_ACR_PACKET_CONTROL, DIG, id), \