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Searched refs:HDMI_ACR_CTS_44 (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h184 SE_SF(HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
262 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
456 uint8_t HDMI_ACR_CTS_44; member
588 uint32_t HDMI_ACR_CTS_44; member
H A Ddce_stream_encoder.c1305 REG_UPDATE(HDMI_ACR_44_0, HDMI_ACR_CTS_44, audio_clock_info.cts_44khz); in dce110_se_setup_hdmi_audio()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn32/
H A Ddcn32_dio_stream_encoder.h79 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn401/
H A Ddcn401_dio_stream_encoder.h81 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
/linux-6.15/drivers/gpu/drm/radeon/
H A Devergreen_hdmi.c92 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); in evergreen_hdmi_update_acr()
H A Drv770d.h792 # define HDMI_ACR_CTS_44(x) (((x) & 0xfffff) << 12) macro
H A Devergreend.h646 # define HDMI_ACR_CTS_44(x) (((x) & 0xfffff) << 12) macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn10/
H A Ddcn10_stream_encoder.h254 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
470 type HDMI_ACR_CTS_44;\
H A Ddcn10_stream_encoder.c1291 REG_UPDATE(HDMI_ACR_44_0, HDMI_ACR_CTS_44, audio_clock_info.cts_44khz); in enc1_se_setup_hdmi_audio()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn314/
H A Ddcn314_dio_stream_encoder.h158 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn35/
H A Ddcn35_dio_stream_encoder.h159 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn30/
H A Ddcn30_dio_stream_encoder.h158 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
H A Ddcn30_dio_stream_encoder.c797 REG_UPDATE(HDMI_ACR_44_0, HDMI_ACR_CTS_44, audio_clock_info.cts_44khz); in enc3_se_setup_hdmi_audio()
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1501 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz); in dce_v6_0_audio_set_acr()
H A Ddce_v10_0.c1499 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz); in dce_v10_0_afmt_update_ACR()
H A Ddce_v11_0.c1548 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz); in dce_v11_0_afmt_update_ACR()