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/linux-6.15/Documentation/gpu/amdgpu/display/
H A Ddc-glossary.rst37 * DISPCLK: Display Clock
56 Display Abstraction layer
59 Display Core
62 Display Controller
71 Display Controller HUB
80 Display Core Next
86 Display Data Channel
89 Display IO
92 Display Pipes and Planes
105 Display Mode Library
[all …]
/linux-6.15/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sc7180-dpu.yaml7 title: Qualcomm Display DPU on SC7180
35 - description: Display hf axi clock
36 - description: Display ahb clock
37 - description: Display rotator clock
38 - description: Display lut clock
39 - description: Display core clock
40 - description: Display vsync clock
41 - description: Display core throttle clock
H A Dqcom,sm6115-dpu.yaml7 title: Qualcomm Display DPU on SM6115
30 - description: Display AXI
31 - description: Display AHB
32 - description: Display core
33 - description: Display lut
34 - description: Display rotator
35 - description: Display vsync
H A Dqcom,sc7280-dpu.yaml7 title: Qualcomm Display DPU on SC7280
38 - description: Display hf axi clock
39 - description: Display sf axi clock
40 - description: Display ahb clock
41 - description: Display lut clock
42 - description: Display core clock
43 - description: Display vsync clock
H A Dqcom,sm7150-dpu.yaml7 title: Qualcomm SM7150 Display Processing Unit (DPU)
30 - description: Display hf axi clock
31 - description: Display ahb clock
32 - description: Display rotator clock
33 - description: Display lut clock
34 - description: Display core clock
35 - description: Display vsync clock
H A Dqcom,qcm2290-dpu.yaml7 title: Qualcomm Display DPU on QCM2290
30 - description: Display AXI clock from gcc
31 - description: Display AHB clock from dispcc
32 - description: Display core clock from dispcc
33 - description: Display lut clock from dispcc
34 - description: Display vsync clock from dispcc
H A Dqcom,sdm845-dpu.yaml7 title: Qualcomm Display DPU on SDM845
32 - description: Display GCC bus clock
33 - description: Display ahb clock
34 - description: Display axi clock
35 - description: Display core clock
36 - description: Display vsync clock
H A Dqcom,sm8650-dpu.yaml7 title: Qualcomm SM8650 Display DPU
33 - description: Display hf axi
34 - description: Display MDSS ahb
35 - description: Display lut
36 - description: Display core
37 - description: Display vsync
H A Dqcom,msm8998-dpu.yaml7 title: Qualcomm Display DPU on MSM8998
34 - description: Display ahb clock
35 - description: Display axi clock
36 - description: Display mem-noc clock
37 - description: Display core clock
38 - description: Display vsync clock
H A Dqcom,mdss.yaml7 title: Qualcomm Mobile Display SubSystem (MDSS)
14 This is the bindings documentation for the Mobile Display Subsystem(MDSS) that
53 - description: Display abh clock
54 - description: Display axi clock
55 - description: Display vsync clock
56 - description: Display core clock
59 - description: Display abh clock
60 - description: Display core clock
H A Dqcom,sm8150-dpu.yaml7 title: Qualcomm SM8150 Display DPU
32 - description: Display ahb clock
33 - description: Display hf axi clock
34 - description: Display core clock
35 - description: Display vsync clock
H A Dqcom,sm6150-dpu.yaml7 title: Qualcomm SM6150 Display DPU
31 - description: Display ahb clock
32 - description: Display hf axi clock
33 - description: Display core clock
34 - description: Display vsync clock
H A Ddsi-phy-common.yaml7 title: Qualcomm Display DSI PHY Common Properties
13 Common properties for Qualcomm Display DSI PHY.
26 - description: Display AHB clock
H A Dqcom,sc8280xp-mdss.yaml7 title: Qualcomm SC8280XP Mobile Display Subsystem
13 Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
24 - description: Display AHB clock from gcc
25 - description: Display AHB clock from dispcc
26 - description: Display core clock
H A Dqcom,sm8350-mdss.yaml7 title: Qualcomm SM8350 Display MDSS
13 MSM Mobile Display Subsystem(MDSS) that encapsulates sub-blocks like
25 - description: Display AHB clock from gcc
26 - description: Display hf axi clock
27 - description: Display sf axi clock
28 - description: Display core clock
/linux-6.15/Documentation/devicetree/bindings/display/panel/
H A Dpanel-simple.yaml100 # DLC Display Co. DLC1010GIG 10.1" WXGA TFT LCD Panel
110 # Emerging Display Technology Corp. 480x272 TFT Display with capacitive touch
112 # Emerging Display Technology Corp. 480x272 TFT Display
114 # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
117 # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
120 # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
125 # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch
128 # Emerging Display Technology Corp. LVDS WSVGA TFT Display with capacitive touch
130 # Emerging Display Technology Corp. 10.1" LVDS WXGA TFT Display with capacitive touch
153 # HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel
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/linux-6.15/drivers/gpu/drm/sun4i/
H A DKconfig3 tristate "DRM Support for Allwinner A10 Display Engine"
14 Display Engine. If M is selected the module will be called
40 tristate "Support for Allwinner A10 Display Engine Backend"
45 original Allwinner Display Engine, which has a backend to
69 have a Display Engine 2.0 contain this controller. If M is
73 tristate "Support for Allwinner Display Engine 2.0 Mixer"
77 Allwinner Display Engine 2.0, which has a mixer to do some
/linux-6.15/samples/rust/
H A Drust_print_main.rs43 use core::fmt::Display; in arc_print()
44 fn arc_dyn_print(arc: &Arc<dyn Display>) { in arc_print() argument
48 let a_i32_display: Arc<dyn Display> = Arc::new(42i32, GFP_KERNEL)?; in arc_print()
49 let a_str_display: Arc<dyn Display> = a.clone(); in arc_print()
/linux-6.15/Documentation/ABI/testing/
H A Dsysfs-class-mei21 Description: Display fw status registers content
36 Description: Display the negotiated HBM protocol version.
45 Description: Display the driver HBM protocol version.
62 Description: Display the ME firmware version.
73 Description: Display the ME device state.
88 Description: Display trc status register content
98 Description: Display kind of the device
H A Dsysfs-platform-wilco-ec15 Display Wilco Embedded Controller firmware build date.
22 Display Wilco Embedded Controller build revision.
30 Display Wilco Embedded Controller model number.
56 Display Wilco Embedded Controller firmware version.
/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dfsl,plldig.yaml7 title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock
13 NXP LS1028A has a clock domain PXLCLK0 used for the Display output
15 which generate and offers pixel clocks to Display.
49 # Display PIXEL Clock node:
/linux-6.15/drivers/gpu/drm/meson/
H A DKconfig3 tristate "DRM Support for Amlogic Meson Display Controller"
18 tristate "HDMI Synopsys Controller support for Amlogic Meson Display"
25 tristate "MIPI DSI Synopsys Controller support for Amlogic Meson Display"
/linux-6.15/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-pxl2dpi.yaml7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
38 LVDS Display Bridge(LDB) in split mode.
/linux-6.15/drivers/video/fbdev/mmp/fb/
H A DKconfig3 tristate "fb driver for Marvell MMP Display Subsystem"
8 fb driver for Marvell MMP Display Subsystem
/linux-6.15/Documentation/devicetree/bindings/regulator/
H A Drichtek,rt4831-regulator.yaml7 title: Richtek RT4831 Display Bias Voltage Regulator
16 For Display Bias Voltage DSVP and DSVN, the output range is about 4V to 6.5V.
34 Properties for single Display Bias Voltage regulator.

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