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Searched refs:AMDGPU_RING_PRIO_DEFAULT (Results 1 – 25 of 46) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ring_mux.c37 { AMDGPU_RING_PRIO_DEFAULT, "gfx_low"},
88 if (mux->ring_entry[i].ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_mux_resubmit_chunks()
218 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) in amdgpu_ring_mux_set_wptr()
242 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT || mux->wptr_resubmit < wptr) { in amdgpu_ring_mux_set_wptr()
357 sw_ring_info[idx].hw_pio : AMDGPU_RING_PRIO_DEFAULT; in amdgpu_sw_ring_priority()
369 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT && in amdgpu_mcbp_scan()
372 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT && in amdgpu_mcbp_scan()
398 if (adev->gfx.mcbp && ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_sw_ring_ib_begin()
413 if (adev->gfx.mcbp && ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) in amdgpu_sw_ring_ib_end()
424 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) in amdgpu_sw_ring_ib_mark_offset()
[all …]
H A Damdgpu_ctx.c158 hw_prio = AMDGPU_RING_PRIO_DEFAULT; in amdgpu_ctx_get_hw_prio()
164 hw_prio = AMDGPU_RING_PRIO_DEFAULT; in amdgpu_ctx_get_hw_prio()
H A Djpeg_v3_0.c124 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v3_0_sw_init()
H A Damdgpu_umsch_mm.c116 return amdgpu_ring_init(adev, ring, 1024, NULL, 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in amdgpu_umsch_mm_ring_init()
H A Djpeg_v5_0_0.c112 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v5_0_0_sw_init()
H A Duvd_v3_1.c565 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v3_1_sw_init()
H A Duvd_v4_2.c122 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v4_2_sw_init()
H A Damdgpu_ring.h52 AMDGPU_RING_PRIO_DEFAULT = 1, enumerator
H A Djpeg_v1_0.c499 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v1_0_sw_init()
H A Duvd_v5_0.c120 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v5_0_sw_init()
H A Damdgpu_cper.c545 AMDGPU_RING_PRIO_DEFAULT, NULL); in amdgpu_cper_ring_init()
H A Duvd_v6_0.c415 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v6_0_sw_init()
429 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v6_0_sw_init()
H A Djpeg_v2_0.c110 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v2_0_sw_init()
H A Djpeg_v2_5.c154 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v2_5_sw_init()
H A Djpeg_v4_0.c131 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v4_0_sw_init()
H A Djpeg_v4_0_5.c165 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v4_0_5_sw_init()
H A Djpeg_v5_0_1.c177 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v5_0_1_sw_init()
H A Dsi_dma.c501 AMDGPU_RING_PRIO_DEFAULT, NULL); in si_dma_sw_init()
H A Duvd_v7_0.c451 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v7_0_sw_init()
473 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v7_0_sw_init()
H A Dmes_v11_0.c1321 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v11_0_ring_init()
1346 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v11_0_kiq_ring_init()
H A Damdgpu_vpe.c285 AMDGPU_RING_PRIO_DEFAULT, NULL); in amdgpu_vpe_ring_init()
H A Dmes_v12_0.c1437 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v12_0_ring_init()
1462 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v12_0_kiq_ring_init()
H A Dsdma_v2_4.c863 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v2_4_sw_init()
H A Dcik_sdma.c974 AMDGPU_RING_PRIO_DEFAULT, NULL); in cik_sdma_sw_init()
H A Dvcn_v5_0_1.c135 AMDGPU_RING_PRIO_DEFAULT, &adev->vcn.inst[i].sched_score); in vcn_v5_0_1_sw_init()

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