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Searched refs:read_cpu_ctrl (Results 1 – 5 of 5) sorted by relevance

/freebsd-14.2/sys/arm/mv/armada/
H A Dwdt.c216 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armv5()
220 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_wdt_enable_armv5()
224 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_wdt_enable_armv5()
238 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armada_38x_xp_helper()
256 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armada_38x()
271 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE_ARMADAXP); in mv_wdt_enable_armada_xp()
291 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_wdt_disable_armv5()
295 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_wdt_disable_armv5()
299 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_disable_armv5()
/freebsd-14.2/sys/arm/mv/
H A Dtimer.c239 irq_cause = read_cpu_ctrl(sc->config->bridge_irq_cause); in mv_timer_attach()
243 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_timer_attach()
274 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_hardclock()
389 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_enable_armv5()
393 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_watchdog_enable_armv5()
397 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_watchdog_enable_armv5()
411 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_enable_armadaxp()
437 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_watchdog_disable_armv5()
441 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_watchdog_disable_armv5()
445 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_disable_armv5()
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H A Dmv_common.c243 read_cpu_ctrl_t read_cpu_ctrl; member
500 cpu_pm_ctrl = read_cpu_ctrl(CPU_PM_CTRL); in mv_fdt_pm()
532 read_cpu_ctrl(uint32_t reg) in read_cpu_ctrl() function
535 if (soc_decode_win_spec->read_cpu_ctrl != NULL) in read_cpu_ctrl()
536 return (soc_decode_win_spec->read_cpu_ctrl(reg)); in read_cpu_ctrl()
642 mask &= read_cpu_ctrl(CPU_PM_CTRL); in soc_power_ctrl_get()
787 mode = read_cpu_ctrl(CPU_CONFIG); in soc_identify()
795 mode = read_cpu_ctrl(CPU_L2_CONFIG) & CPU_L2_CONFIG_MODE; in soc_identify()
800 mode = read_cpu_ctrl(CPU_CONTROL); in soc_identify()
H A Dmvvar.h107 uint32_t read_cpu_ctrl(uint32_t);
H A Dmv_pci.c577 (read_cpu_ctrl(CPU_CONTROL) & CPU_CONTROL_PCIE_DISABLE(unit))) { in mv_pcib_enable()
578 write_cpu_ctrl(CPU_CONTROL, read_cpu_ctrl(CPU_CONTROL) & in mv_pcib_enable()