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/freebsd-14.2/sys/dev/isci/scil/
H A Dscic_sds_phy_registers.h102 #define SCU_TLCR_READ(phy) \ argument
114 #define SCU_TLADTR_READ(phy) \ argument
120 #define SCU_TLADTR_WRITE(phy) \ argument
132 #define SCU_STPTLDARNI_READ(phy) \ argument
165 #define SCU_SAS_TIPID_READ(phy) \ argument
173 #define SCU_SAS_TIID_READ(phy) \ argument
181 #define SCU_SAS_TIDNH_READ(phy) \ argument
189 #define SCU_SAS_TIDNL_READ(phy) \ argument
213 #define SCU_SAS_PCFG_READ(phy) \ argument
229 #define SCU_SAS_CLKSM_READ(phy) \ argument
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/freebsd-14.2/sys/net80211/
H A Dieee80211_phy.c92 [0] = { .phy = CCK, 1000, 0x00, B(2), 0 },
93 [1] = { .phy = CCK, 2000, 0x04, B(4), 1 },
94 [2] = { .phy = CCK, 5500, 0x04, B(11), 2 },
95 [3] = { .phy = CCK, 11000, 0x04, B(22), 3 },
96 [4] = { .phy = OFDM, 6000, 0x00, 12, 4 },
103 [11] = { .phy = OFDM, 54000, 0x00, 108, 8 }
119 [7] = { .phy = OFDM, 54000, 0x00, 108, 4 }
135 [7] = { .phy = HALF, 27000, 0x00, 54, 4 }
322 if (rt->info[i].phy == IEEE80211_T_HT) { in ieee80211_setup_ratetable()
514 switch (rt->info[rix].phy) { in ieee80211_compute_duration()
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/freebsd-14.2/sys/dev/cxgb/common/
H A Dcxgb_ael1002.c272 phy->modtype = err; in ael1002_reset()
347 struct cphy *phy = &pinfo->phy; in t3_ael1002_phy_prep() local
352 ael100x_txon(phy); in t3_ael1002_phy_prep()
357 phy->modtype = err; in t3_ael1002_phy_prep()
428 struct cphy *phy = &pinfo->phy; in t3_ael1006_phy_prep() local
434 ael100x_txon(phy); in t3_ael1006_phy_prep()
1387 struct cphy *phy = &pinfo->phy; in t3_ael2005_phy_prep() local
1425 phy->priv = edc_sr; in ael2020_setup_sr_edc()
2139 struct cphy *phy = &pinfo->phy; in t3_ael2020_phy_prep() local
2218 struct cphy *phy = &pinfo->phy; in t3_qt2045_phy_prep() local
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H A Dcxgb_aq100x.c109 err = aq100x_set_defaults(phy); in aq100x_reset()
126 AQ_WRITE_REGS(phy, imasks); in aq100x_intr_enable()
144 AQ_WRITE_REGS(phy, imasks); in aq100x_intr_disable()
150 aq100x_intr_clear(struct cphy *phy) in aq100x_intr_clear() argument
160 AQ_READ_REGS(phy, iclr); in aq100x_intr_clear()
182 phy->addr, aq100x_temperature(phy)); in aq100x_vendor_intr()
220 phy->addr, cause); in aq100x_intr_handler()
247 phy->addr, v); in aq100x_power_down()
259 err = aq100x_power_down(phy, 0); in aq100x_autoneg_enable()
466 struct cphy *phy = &pinfo->phy; in t3_aq100x_phy_prep() local
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/freebsd-14.2/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5_pcb135_board.dtsi212 phy0: ethernet-phy@0 {
215 phy1: ethernet-phy@1 {
218 phy2: ethernet-phy@2 {
221 phy3: ethernet-phy@3 {
224 phy4: ethernet-phy@4 {
227 phy5: ethernet-phy@5 {
230 phy6: ethernet-phy@6 {
233 phy7: ethernet-phy@7 {
236 phy8: ethernet-phy@8 {
239 phy9: ethernet-phy@9 {
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/freebsd-14.2/sys/dev/etherswitch/ar40xx/
H A Dar40xx_phy.c82 int phy; in ar40xx_phy_tick() local
91 for (phy = 0; phy < AR40XX_NUM_PHYS; phy++) { in ar40xx_phy_tick()
141 int phy; in ar40xx_phy_miiforport() local
143 phy = port-1; in ar40xx_phy_miiforport()
145 if (phy < 0 || phy >= AR40XX_NUM_PHYS) in ar40xx_phy_miiforport()
153 int phy; in ar40xx_phy_ifpforport() local
156 if (phy < 0 || phy >= AR40XX_NUM_PHYS) in ar40xx_phy_ifpforport()
201 for (phy = 0; phy < AR40XX_NUM_PHYS; phy++) { in ar40xx_attach_phys()
222 phy); in ar40xx_attach_phys()
232 int phy; in ar40xx_hw_phy_get_ids() local
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H A Dar40xx_hw_psgmii.c181 sc->sc_psgmii.phy_t_status |= BIT(phy); in ar40xx_hw_psgmii_single_phy_testing()
191 int phy, j; in ar40xx_hw_psgmii_all_phy_testing() local
197 for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { in ar40xx_hw_psgmii_all_phy_testing()
205 if (phy >= (AR40XX_NUM_PORTS - 1)) in ar40xx_hw_psgmii_all_phy_testing()
223 for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { in ar40xx_hw_psgmii_all_phy_testing()
322 uint32_t i, phy, reg; in ar40xx_hw_psgmii_self_test() local
330 for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { in ar40xx_hw_psgmii_self_test()
347 for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { in ar40xx_hw_psgmii_self_test()
358 for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) in ar40xx_hw_psgmii_self_test()
390 int phy; in ar40xx_hw_psgmii_self_test_clean() local
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/freebsd-14.2/sys/dev/e1000/
H A De1000_phy.c72 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_ops_generic() local
226 struct e1000_phy_info *phy = &hw->phy; in e1000_get_phy_id() local
292 struct e1000_phy_info *phy = &hw->phy; in e1000_read_phy_reg_mdic() local
357 struct e1000_phy_info *phy = &hw->phy; in e1000_write_phy_reg_mdic() local
423 struct e1000_phy_info *phy = &hw->phy; in e1000_read_phy_reg_i2c() local
470 struct e1000_phy_info *phy = &hw->phy; in e1000_write_phy_reg_i2c() local
1121 struct e1000_phy_info *phy = &hw->phy; in e1000_copper_link_setup_m88() local
1274 struct e1000_phy_info *phy = &hw->phy; in e1000_copper_link_setup_m88_gen2() local
1372 struct e1000_phy_info *phy = &hw->phy; in e1000_copper_link_setup_igp() local
1483 struct e1000_phy_info *phy = &hw->phy; in e1000_phy_setup_autoneg() local
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/freebsd-14.2/sys/dev/igc/
H A Digc_phy.c20 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_ops_generic() local
133 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id() local
169 struct igc_phy_info *phy = &hw->phy; in igc_read_phy_reg_mdic() local
228 struct igc_phy_info *phy = &hw->phy; in igc_write_phy_reg_mdic() local
288 struct igc_phy_info *phy = &hw->phy; in igc_phy_setup_autoneg() local
296 phy->autoneg_advertised &= phy->autoneg_mask; in igc_phy_setup_autoneg()
472 struct igc_phy_info *phy = &hw->phy; in igc_copper_link_autoneg() local
481 phy->autoneg_advertised &= phy->autoneg_mask; in igc_copper_link_autoneg()
656 struct igc_phy_info *phy = &hw->phy; in igc_set_d3_lplu_state_generic() local
740 struct igc_phy_info *phy = &hw->phy; in igc_check_downshift_generic() local
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/freebsd-14.2/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,qmp-phy.yaml5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
97 vdda-phy-supply:
111 "^phy@[0-9a-f]+$":
158 - const: phy
161 - vdda-phy-supply
188 - const: phy
191 - vdda-phy-supply
218 - const: phy
251 - const: phy
334 - const: phy
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H A Dqcom,qmp-usb-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,qmp-usb-phy.yaml#
70 vdda-phy-supply: true
77 "^phy@[0-9a-f]+$":
100 "#phy-cells":
108 - "#phy-cells"
122 - vdda-phy-supply
148 - const: phy
170 - const: phy
196 - const: phy
223 - const: phy
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H A Dqcom,msm8996-qmp-usb3-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-usb3-phy.yaml#
73 vdda-phy-supply: true
80 "^phy@[0-9a-f]+$":
103 "#phy-cells":
111 - "#phy-cells"
125 - vdda-phy-supply
151 - const: phy
173 - const: phy
199 - const: phy
225 - const: phy
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H A Dqcom,ipq8074-qmp-pcie-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,ipq8074-qmp-pcie-phy.yaml#
64 vdda-phy-supply: true
71 "^phy@[0-9a-f]+$":
94 "#phy-cells":
102 - "#phy-cells"
139 - const: phy
142 - vdda-phy-supply
165 - const: phy
196 - const: phy
198 - vdda-phy-supply
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H A Dqcom,qmp-pcie-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml#
61 vdda-phy-supply: true
68 "^phy@[0-9a-f]+$":
91 "#phy-cells":
99 - "#phy-cells"
136 - const: phy
139 - vdda-phy-supply
162 - const: phy
193 - const: phy
195 - vdda-phy-supply
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H A Dqcom,qmp-ufs-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,qmp-ufs-phy.yaml#
61 vdda-phy-supply: true
68 "^phy@[0-9a-f]+$":
76 "#phy-cells":
81 - "#phy-cells"
95 - vdda-phy-supply
168 "^phy@[0-9a-f]+$":
186 "^phy@[0-9a-f]+$":
204 "^phy@[0-9a-f]+$":
216 phy-wrapper@1d87000 {
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H A Dqcom,msm8996-qmp-ufs-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#
63 vdda-phy-supply: true
70 "^phy@[0-9a-f]+$":
81 "#phy-cells":
86 - "#phy-cells"
100 - vdda-phy-supply
171 "^phy@[0-9a-f]+$":
189 "^phy@[0-9a-f]+$":
207 "^phy@[0-9a-f]+$":
220 phy-wrapper@1d87000 {
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/freebsd-14.2/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls2088a-rdb.dts27 phy-handle = <&mdio1_phy1>;
32 phy-handle = <&mdio1_phy2>;
37 phy-handle = <&mdio1_phy3>;
42 phy-handle = <&mdio1_phy4>;
47 phy-handle = <&mdio2_phy1>;
52 phy-handle = <&mdio2_phy2>;
57 phy-handle = <&mdio2_phy3>;
94 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
100 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
106 compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
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H A Dfsl-lx2160a-bluebox3.dts57 phy-handle = <&aqr113c_phy1>;
58 phy-mode = "usxgmii";
63 phy-handle = <&aqr113c_phy2>;
64 phy-mode = "usxgmii";
70 phy-mode = "usxgmii";
76 phy-mode = "usxgmii";
81 phy-mode = "rgmii";
91 phy-mode = "rgmii";
377 phy-mode = "sgmii";
408 phy-mode = "sgmii";
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/freebsd-14.2/sys/contrib/dev/mediatek/mt76/mt7915/
H A Dtestmode.c40 struct mt7915_dev *dev = phy->dev; in mt7915_tm_set_tx_power()
41 struct mt76_phy *mphy = phy->mt76; in mt7915_tm_set_tx_power()
54 .band_idx = phy->mt76->band_idx, in mt7915_tm_set_tx_power()
201 u8 band = phy->mt76->band_idx; in mt7915_tm_set_ipg_params()
339 u32 *b = phy->test.reg_backup; in mt7915_tm_reg_backup_restore()
340 u8 band = phy->mt76->band_idx; in mt7915_tm_reg_backup_restore()
372 phy->test.reg_backup = b; in mt7915_tm_reg_backup_restore()
417 mt7915_mcu_add_bss_info(phy, phy->monitor_vif, en); in mt7915_tm_init()
428 mt7915_set_channel(phy); in mt7915_tm_update_channel()
644 mt7915_tm_set_tx_power(phy); in mt7915_tm_update_params()
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/freebsd-14.2/sys/contrib/dev/mediatek/mt76/
H A Dmac80211.c217 phy->leds.cdev.name = phy->leds.name; in mt76_led_init()
225 if (phy == &dev->phy) { in mt76_led_init()
298 mt76_init_stream_cap(phy, &phy->sband_2g.sband, false); in mt76_set_stream_caps()
300 mt76_init_stream_cap(phy, &phy->sband_5g.sband, vht); in mt76_set_stream_caps()
302 mt76_init_stream_cap(phy, &phy->sband_6g.sband, vht); in mt76_set_stream_caps()
514 return phy; in mt76_alloc_phy()
523 ret = mt76_phy_init(phy, phy->hw); in mt76_register_phy()
563 phy->dev->phys[phy->band_idx] = phy; in mt76_register_phy()
647 phy = &dev->phy; in mt76_alloc_device()
651 dev->phys[phy->band_idx] = phy; in mt76_alloc_device()
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/freebsd-14.2/sys/dev/etherswitch/arswitch/
H A Darswitch_reg.c72 *phy = (addr >> 6) & 0x7; in arswitch_split_setpage()
90 uint16_t phy, reg; in arswitch_readreg16() local
102 uint16_t phy, reg; in arswitch_writereg16() local
151 phy, reg, lo); in arswitch_reg_write32()
153 phy, reg + 1, hi); in arswitch_reg_write32()
156 phy, reg + 1, hi); in arswitch_reg_write32()
158 phy, reg, lo); in arswitch_reg_write32()
167 uint16_t phy, reg; in arswitch_readreg() local
176 uint16_t phy, reg; in arswitch_writereg() local
221 uint16_t phy, reg; in arswitch_modifyreg() local
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/freebsd-14.2/sys/dev/bxe/
H A Dbxe_elink.c7737 cur_link_up = phy->read_status(phy, params, in elink_link_update()
9111 if (params->phy[idx].type == phy->type) { in elink_get_edc_mode()
9131 if (&(params->phy[phy_idx]) == phy) { in elink_get_edc_mode()
9202 fw_cmd_param = ELINK_FW_PARAM_SET(phy->addr, phy->type, phy->mdio_ctrl); in elink_verify_sfp_module()
9648 phy = &params->phy[ELINK_INT_PHY]; in elink_handle_module_detect_int()
9652 phy = &params->phy[ELINK_EXT_PHY1]; in elink_handle_module_detect_int()
13120 phy->media_type, phy->flags, phy->supported); in elink_populate_int_phy()
13151 port, phy->addr, phy->mdio_ctrl); in elink_populate_int_phy()
13281 phy->addr, phy->mdio_ctrl); in elink_populate_ext_phy()
13372 phy->req_duplex, phy->req_line_speed, phy->req_flow_ctrl); in elink_phy_def_cfg()
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/freebsd-14.2/sys/contrib/dev/mediatek/mt76/mt7615/
H A Dmain.c24 return phy && test_bit(MT76_STATE_RUNNING, &phy->mt76->state); in mt7615_dev_running()
54 if (phy != &dev->phy) { in mt7615_start()
115 if (phy != &dev->phy) { in mt7615_stop()
186 bool ext_phy = phy != &dev->phy; in mt7615_add_interface()
288 bool ext_phy = phy != &dev->phy; in mt7615_set_channel()
324 phy->noise = 0; in mt7615_set_channel()
439 bool band = phy != &dev->phy; in mt7615_config()
501 bool band = phy != &dev->phy; in mt7615_configure_filter()
805 int err, band = phy != &dev->phy; in mt7615_set_rts_threshold()
1006 bool ext_phy = phy != &dev->phy; in mt7615_set_antenna()
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/freebsd-14.2/tools/tools/net80211/wlantxtime/
H A Dwlantxtime.c51 uint8_t phy; /* CCK/OFDM/TURBO */ member
115 [0] = { .phy = CCK, 1000, 0x00, B(2), 0 },
116 [1] = { .phy = CCK, 2000, 0x04, B(4), 1 },
117 [2] = { .phy = CCK, 5500, 0x04, B(11), 2 },
118 [3] = { .phy = CCK, 11000, 0x04, B(22), 3 },
126 [11] = { .phy = OFDM, 54000, 0x00, 108, 8 }
142 [7] = { .phy = OFDM, 54000, 0x00, 108, 4 }
158 [7] = { .phy = HALF, 27000, 0x00, 54, 4 }
339 switch (rt->info[rix].phy) { in ieee80211_compute_duration()
390 rt->info[rix].phy, rate); in ieee80211_compute_duration()
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/freebsd-14.2/sys/dev/ixgbe/
H A Dixgbe_phy.c249 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_generic() local
299 hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_probe_phy()
360 hw->phy.addr = 0; in ixgbe_identify_phy_generic()
1375 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1474 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1549 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1565 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1734 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1737 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1808 hw->phy.type = in ixgbe_identify_qsfp_module_generic()
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