| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelDAGToDAG.cpp | 306 if (isNullConstant(Op2)) { in selectAddCarry() 349 if (isNullConstant(Op2)) { in selectSubCarry()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2103 if (isNullConstant(Op1)) in EmitCmp() 2155 if (Op0.hasOneUse() && isNullConstant(Op1) && in LowerSETCC() 2166 if ((isOneConstant(Op1) || isNullConstant(Op1)) && in LowerSETCC() 2173 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1); in LowerSETCC() 2191 if (!isNullConstant(Op1)) { in LowerSETCC() 2278 isNullConstant(Cond.getOperand(1).getOperand(0))) { in LowerSELECT() 2291 if (isNullConstant(Y) && in LowerSELECT() 2316 if (!isNullConstant(Op2)) in LowerSELECT() 2382 (isNullConstant(Op1) || isNullConstant(Op2))) { in LowerSELECT() 2461 isNullConstant(Cond.getOperand(1)) && in LowerBRCOND()
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| H A D | M68kISelDAGToDAG.cpp | 343 if (llvm::isNullConstant(U->getOperand(0))) in INITIALIZE_PASS()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSelectionDAGInfo.cpp | 68 if (isNullConstant(Src)) in EmitSpecializedLibcall()
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| H A D | ARMISelLowering.cpp | 4841 if (isNullConstant(RHS)) { in getARMCmp() 5432 if (isNullConstant(LowerSatConstant)) { in LowerSELECT_CC() 10243 isNullConstant(N->getOperand(0)))); in isZeroVector() 13140 isNullConstant(LHS->getOperand(0)) && in PerformAddcSubcCombine() 14185 isNullConstant(Mask->getOperand(3))) in PerformMVEVMULLCombine() 14986 isNullConstant(CSInc.getOperand(0)) && in IsCMPZCSINC() 18085 if (!isNullConstant(CmpZ->getOperand(1))) in PerformCMOVToBFICombine() 18412 isNullConstant(RHS)) { in PerformCMOVCombine() 18439 if (isNullConstant(FalseVal)) { in PerformCMOVCombine() 18480 } else if (isNullConstant(TrueVal)) { in PerformCMOVCombine() [all …]
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| H A D | ARMISelDAGToDAG.cpp | 1133 if (!isNullConstant(N)) in SelectThumbAddrModeRRSext() 2721 return isNullConstant(N->getOperand(OpNo)); in SelectBaseMVE_VMLLDAV() 3560 if (!isNullConstant(Zero) || And->getOpcode() != ISD::AND) in SelectCMPZ() 3990 if (!isNullConstant(Zero) || Subc.getOperand(1) != SmulLoHi.getValue(0) || in Select()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.h | 28 return V.isUndef() || isNullConstant(V); in isNullConstantOrUndef()
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| H A D | AMDGPUISelDAGToDAG.cpp | 86 if (isNullConstant(Idx) && In.getValueSizeInBits() <= 32) in stripExtractLoElt() 1592 if (Subtarget->hasRestrictedSOffset() && isNullConstant(ByteOffsetNode)) { in SelectBUFSOffset() 2359 isNullConstant(VCMP.getOperand(1))) { in combineBallotPattern() 2394 isNullConstant(Cond->getOperand(1)) && in SelectBRCOND()
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| H A D | R600ISelLowering.cpp | 798 return isNullConstant(Op); in isHWFalseValue() 954 if (isNullConstant(Op.getOperand(0)) && SrcAS == AMDGPUAS::FLAT_ADDRESS) in lowerADDRSPACECAST()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.cpp | 552 if (isNullConstant(BasePtr)) in getGatherScatterAddress()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2750 if (isNullConstant(N1)) in visitADDLike() 3054 if (isNullConstant(N1)) in visitADDSAT() 3250 if (isNullConstant(N1)) in visitADDC() 3419 if (isNullConstant(N0) && isNullConstant(N1)) { in visitUADDO_CARRY() 4212 if (isNullConstant(N1)) in visitSUBSAT() 4239 if (isNullConstant(N1)) in visitSUBC() 4354 if (isNullConstant(N1)) in visitMULFIX() 5113 if (isNullConstant(N1)) in visitMULHS() 5173 if (isNullConstant(N1)) in visitMULHU() 6337 if (!isNullConstant(F)) in combineSelectAsExtAnd() [all …]
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| H A D | SelectionDAG.cpp | 4061 if (isNullConstant(N1)) in computeOverflowForSignedAdd() 4076 if (isNullConstant(N1)) in computeOverflowForUnsignedAdd() 4099 if (isNullConstant(N1)) in computeOverflowForSignedSub() 4117 if (isNullConstant(N1)) in computeOverflowForUnsignedSub() 4130 if (isNullConstant(N1) || isOneConstant(N1)) in computeOverflowForUnsignedMul() 4143 if (isNullConstant(N1) || isOneConstant(N1)) in computeOverflowForSignedMul() 5327 if (isNullConstant(Op.getOperand(0))) in isKnownNeverZero() 7786 bool IsZeroVal = isNullConstant(Src); in getMemsetStores() 8170 if (isNullConstant(Src) && BzeroName) { in getMemset() 11522 bool llvm::isNullConstant(SDValue V) { in isNullConstant() function in llvm [all …]
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| H A D | TargetLowering.cpp | 814 (isNullConstant(Op1) || ISD::isBuildVectorAllZeros(Op1.getNode()))) in SimplifyMultipleUseDemandedBits() 1710 (isNullConstant(Op1) || ISD::isBuildVectorAllZeros(Op1.getNode()))) in SimplifyDemandedBits() 2798 isNullConstant(Op0)) in SimplifyDemandedBits() 3084 if (isNullConstant(Idx)) { in SimplifyDemandedVectorElts() 3214 (isNullConstant(SrcOp) || isNullFPConstant(SrcOp))) { in SimplifyDemandedVectorElts() 3926 if (Cond == ISD::SETNE && isNullConstant(N1) && in foldSetCCWithAnd() 3943 if (AndC && isNullConstant(N1) && AndC->getAPIntValue().isPowerOf2() && in foldSetCCWithAnd() 3993 if (isNullConstant(Y)) in foldSetCCWithAnd() 6692 turnVectorIntoSplatVector(PAmts, isNullConstant); in prepareUREMEqFold() 6946 turnVectorIntoSplatVector(PAmts, isNullConstant); in prepareSREMEqFold() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1032 return isNullConstant(Op.getOperand(1)) || in ppSimplifyOrSelect0() 1033 isNullConstant(Op.getOperand(2)); in ppSimplifyOrSelect0() 1047 if (isNullConstant(SY)) { in ppSimplifyOrSelect0() 1051 } else if (isNullConstant(SX)) { in ppSimplifyOrSelect0()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7080 if (isNullConstant(TrueV)) { in combineSelectToBinOp() 7204 if (isNullConstant(FalseV)) in lowerSELECT() 7207 if (isNullConstant(TrueV)) in lowerSELECT() 7989 if (isNullConstant(Idx)) { in lowerINSERT_VECTOR_ELT() 8016 if (isNullConstant(Idx)) { in lowerINSERT_VECTOR_ELT() 8086 if (isNullConstant(Idx)) { in lowerEXTRACT_VECTOR_ELT() 8209 if (!isNullConstant(Idx)) { in lowerEXTRACT_VECTOR_ELT() 11866 if (!isNullConstant(Idx)) { in ReplaceNodeResults() 14512 if (isNullConstant(RHS)) { in combine_CC() 16058 if (!isNullConstant(VL)) in PerformDAGCombine() [all …]
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| H A D | RISCVISelDAGToDAG.cpp | 2643 if (isNullConstant(RHS)) { in selectSETCC() 3261 !isNullConstant(N->getOperand(1))) in doPeepholeSExtW()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3809 isNullConstant(Vec.getOperand(2))) in extractSubVector() 22267 bool CmpNull = isNullConstant(RHS); in MatchVectorAllEqualTest() 22531 if (isNullConstant(Op1)) in EmitCmp() 23517 if (isNullConstant(Op1)) { in EmitAVX512Test() 23531 if (!isNullConstant(Op1)) in EmitAVX512Test() 24094 (isNullConstant(Op1) || isNullConstant(Op2))) { in LowerSELECT() 42950 isNullConstant(N0.getOperand(1))) in combineBitcast() 43961 assert(isNullConstant(Index) && in combineArithReduction() 53805 if (!isNullConstant(N->getOperand(1))) in combineCMP() 54367 return isNullConstant(V.getOperand(0)) || isNullConstant(V.getOperand(1)) || in pushAddIntoCmovOfConsts() [all …]
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| H A D | X86ISelDAGToDAG.cpp | 767 isNullConstant(Root->getOperand(2)) && in IsProfitableToFold() 1787 if (isNullConstant(Address) && AM.Segment.getNode() == nullptr && in matchLoadInAddress() 3514 IsNegate = isNullConstant(StoredVal.getOperand(0)); in foldLoadStoreIntoMemOperand() 5856 if (!isNullConstant(N1)) in Select() 6167 if (isNullConstant(Node->getOperand(0)) && in Select() 6168 isNullConstant(Node->getOperand(1))) { in Select()
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| H A D | X86InstrFragmentsSIMD.td | 1098 return !isNullConstant(N->getOperand(1)); 1111 return !isNullConstant(N->getOperand(1));
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4724 isNullConstant(N0.getOperand(1)) && in LowerMUL() 4726 isNullConstant(N1.getOperand(1))) { in LowerMUL() 10775 if (!isNullConstant(Op)) in LowerAsmOperandForConstraint() 17993 !isNullConstant(N->getOperand(1))) in performFirstTrueTestVectorCombine() 18967 if (!isNullConstant(RHS)) in foldADCToCINC() 22235 if (isNullConstant(LHS)) in performBRCONDCombine() 22238 if (!isNullConstant(RHS)) in performBRCONDCombine() 22280 if (!isNullConstant(Zero) || !isNullConstant(SUBS.getOperand(1))) in foldCSELofCTTZ() 22500 bool IsNull = isNullConstant(RHS); in performSETCCCombine() 23491 if (!isNullConstant(InsertIdx)) in removeRedundantInsertVectorElt() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2833 (isNullConstant(RHS) || isAllOnesConstant(RHS)) && in performSETCCCombine() 2838 int Intrin = isNullConstant(RHS) ? Intrinsic::wasm_anytrue in performSETCCCombine() 2851 if ((isNullConstant(RHS) && (Cond == ISD::SETEQ)) || in performSETCCCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2087 if (isNullConstant(RHS) && CC == ISD::SETNE && in LookThroughSetCC() 2094 isOneConstant(LHS.getOperand(0)) && isNullConstant(LHS.getOperand(1))) { in LookThroughSetCC() 2651 isNullConstant(RHS) && !ISD::isUnsignedIntSetCC(CC)) in LowerBR_CC() 2709 isNullConstant(RHS) && !ISD::isUnsignedIntSetCC(CC) && IsEligibleType) in LowerSELECT_CC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4863 if (!isNullConstant(CmpRHS)) in tryFoldSWTestBRCC() 4912 isNullConstant(LHS.getOperand(1))) in trySelectLoopCountIntrinsic() 5873 if (!isPPC64 && isNullConstant(N->getOperand(1)) && in Select() 5874 isOneConstant(N->getOperand(2)) && isNullConstant(N->getOperand(3)) && in Select() 6714 if (!isNullConstant(Op2->getOperand(0))) in AllUsersSelectZero()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1328 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1152 bool andCC = isNullConstant(RHS) && LHS.hasOneUse() && in LowerSETCC()
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