Lines Matching refs:isNullConstant
814 (isNullConstant(Op1) || ISD::isBuildVectorAllZeros(Op1.getNode()))) in SimplifyMultipleUseDemandedBits()
1710 (isNullConstant(Op1) || ISD::isBuildVectorAllZeros(Op1.getNode()))) in SimplifyDemandedBits()
2798 isNullConstant(Op0)) in SimplifyDemandedBits()
3084 if (isNullConstant(Idx)) { in SimplifyDemandedVectorElts()
3214 (isNullConstant(SrcOp) || isNullFPConstant(SrcOp))) { in SimplifyDemandedVectorElts()
3347 KnownZero.setBitVal(Idx, isNullConstant(Scl) || isNullFPConstant(Scl)); in SimplifyDemandedVectorElts()
3926 if (Cond == ISD::SETNE && isNullConstant(N1) && in foldSetCCWithAnd()
3943 if (AndC && isNullConstant(N1) && AndC->getAPIntValue().isPowerOf2() && in foldSetCCWithAnd()
3993 if (isNullConstant(Y)) in foldSetCCWithAnd()
6692 turnVectorIntoSplatVector(PAmts, isNullConstant); in prepareUREMEqFold()
6946 turnVectorIntoSplatVector(PAmts, isNullConstant); in prepareSREMEqFold()
9900 if (isNullConstant(Op.getOperand(1)) && CC == ISD::SETEQ) { in lowerCmpEqZeroToCtlzSrl()