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Searched refs:isBeforeLegalizeOps (Results 1 – 13 of 13) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp618 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()
634 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()
3981 if (DCI.isBeforeLegalizeOps() || in foldSetCCWithAnd()
4425 (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
4434 (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
4684 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
4737 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
4866 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()
4886 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()
5129 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp563 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine()
672 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine()
753 if (DCI.isBeforeLegalizeOps()) in performCMovFPCombine()
780 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performANDCombine()
867 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performORCombine()
1058 if (DCI.isBeforeLegalizeOps()) { in performSUBCombine()
1073 if (DCI.isBeforeLegalizeOps()) { in performADDCombine()
1108 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasCnMips()) in performSHLCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1511 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
1527 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp2101 if (DCI.isBeforeLegalizeOps()) in performANDCombine()
2187 if (DCI.isBeforeLegalizeOps()) in performSRLCombine()
2238 if (DCI.isBeforeLegalizeOps()) in performORCombine()
2449 if (DCI.isBeforeLegalizeOps()) in performBITREV_WCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp16800 if (DCI.isBeforeLegalizeOps()) in performXorCombine()
17074 if (DCI.isBeforeLegalizeOps()) in performMulCombine()
17696 if (DCI.isBeforeLegalizeOps()) in performSVEAndCombine()
18224 if (DCI.isBeforeLegalizeOps()) in performConcatVectorsCombine()
18370 if (DCI.isBeforeLegalizeOps()) in performExtractSubvectorCombine()
18437 if (DCI.isBeforeLegalizeOps()) in tryCombineFixedPointConvert()
18874 if (DCI.isBeforeLegalizeOps()) in performAddSubLongCombine()
19571 if (DCI.isBeforeLegalizeOps()) in tryCombineLongOpWithDup()
21107 if (DCI.isBeforeLegalizeOps()) in performPostLD1Combine()
23321 if (DCI.isBeforeLegalizeOps()) in performSignExtendInRegCombine()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp42672 if (!DCI.isBeforeLegalizeOps()) in combineCastedMaskArithmetic()
43649 if (DCI.isBeforeLegalizeOps()) in combineExtractWithShuffle()
44333 if (!DCI.isBeforeLegalizeOps()) in combineToExtendBoolVectorInReg()
48646 if (DCI.isBeforeLegalizeOps()) in combineAnd()
49403 if (DCI.isBeforeLegalizeOps()) in combineOr()
51820 if (DCI.isBeforeLegalizeOps()) in combineXor()
52654 if (!DCI.isBeforeLegalizeOps()) in combineSext()
52870 if (DCI.isBeforeLegalizeOps()) in combineZext()
53407 if (DCI.isBeforeLegalizeOps()) { in combineGatherScatter()
55264 if (DCI.isBeforeLegalizeOps()) in combineINSERT_SUBVECTOR()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1868 if (DCI.isBeforeLegalizeOps() || in PerformDAGCombine()
H A DAMDGPUISelLowering.cpp5177 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
H A DSIISelLowering.cpp12122 if (VT != MVT::i64 || DCI.isBeforeLegalizeOps()) in performOrCombine()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4093 bool isBeforeLegalizeOps() const { return Level < AfterLegalizeVectorOps; } in isBeforeLegalizeOps() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3476 if (DCI.isBeforeLegalizeOps()) in PerformDAGCombine()
H A DHexagonISelLoweringHVX.cpp3599 if (DCI.isBeforeLegalizeOps()) in PerformHvxDAGCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp15017 if (DCI.isBeforeLegalizeOps()) in expandVSXLoadForLE()
15083 if (DCI.isBeforeLegalizeOps()) in expandVSXStoreForLE()
17918 bool LegalOps = !DCI.isBeforeLegalizeOps(); in combineFMALike()