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Searched refs:getSUnit (Results 1 – 25 of 31) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DScheduleDAG.cpp111 if (!Required && PredDep.getSUnit() == D.getSUnit()) in addPred()
135 SUnit *N = D.getSUnit(); in addPred()
182 SUnit *N = D.getSUnit(); in removePred()
226 SUnit *SuccSU = SuccDep.getSUnit(); in setDepthDirty()
241 SUnit *PredSU = PredDep.getSUnit(); in setHeightDirty()
274 SUnit *PredSU = PredDep.getSUnit(); in ComputeDepth()
305 SUnit *SuccSU = SuccDep.getSUnit(); in ComputeHeight()
371 dumpNodeName(*Dep.getSUnit()); in dumpNodeAll()
381 dumpNodeName(*Dep.getSUnit()); in dumpNodeAll()
502 SUnit *SU = PredDep.getSUnit(); in InitDAGTopologicalSorting()
[all …]
H A DMachinePipeliner.cpp732 SUnit *SuccSU = SI.getSUnit(); in isSuccOrder()
973 SUnit *DefSU = getSUnit(DefMI); in changeDependences()
990 if (P.getSUnit() == DefSU) in changeDependences()
1581 SUnit *TargetSU = D.getSUnit(); in swapAntiDependences()
1831 SUnit *pred = P.getSUnit(); in computeNodeFunctions()
1851 SUnit *succ = S.getSUnit(); in computeNodeFunctions()
2612 SUnit *SU = getSUnit(MI); in applyInstrChange()
2854 return P.getSUnit(); in multipleIterations()
2874 if (Dep.getSUnit() == I) { in computeStart()
2988 if (S.getSUnit() != *I) in orderDependence()
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H A DMacroFusion.cpp41 return SI.getSUnit(); in getPredClusterSU()
83 if (SI.getSUnit() == &SecondSU) in fuseInstructionPair()
87 if (SI.getSUnit() == &FirstSU) in fuseInstructionPair()
100 SUnit *SU = SI.getSUnit(); in fuseInstructionPair()
113 SUnit *SU = SI.getSUnit(); in fuseInstructionPair()
197 SUnit &DepSU = *Dep.getSUnit(); in scheduleAdjacentImpl()
H A DVLIWMachineScheduler.cpp97 if (S.getSUnit() == SUu && S.getLatency() > 0) in hasDependence()
312 unsigned PredReadyCycle = PI.getSUnit()->TopReadyCycle; in releaseTopNode()
330 unsigned SuccReadyCycle = I->getSUnit()->BotReadyCycle; in releaseBottomNode()
554 if (!Pred.getSUnit()->isScheduled && (Pred.getSUnit() != SU2)) in isSingleUnscheduledPred()
569 if (!Succ.getSUnit()->isScheduled && (Succ.getSUnit() != SU2)) in isSingleUnscheduledSucc()
667 if (isSingleUnscheduledPred(SI.getSUnit(), SU)) in SchedulingCost()
673 if (isSingleUnscheduledSucc(PI.getSUnit(), SU)) in SchedulingCost()
713 Top.ResourceModel->isInPacket(PI.getSUnit())) { in SchedulingCost()
722 Bot.ResourceModel->isInPacket(SI.getSUnit())) { in SchedulingCost()
738 Top.ResourceModel->isInPacket(PI.getSUnit())) { in SchedulingCost()
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H A DLatencyPriorityQueue.cpp59 SUnit &Pred = *P.getSUnit(); in getSingleUnscheduledPred()
77 if (getSingleUnscheduledPred(Succ.getSUnit()) == SU) in push()
91 AdjustPriorityOfUnscheduledPreds(Succ.getSUnit()); in scheduledNode()
H A DMachineScheduler.cpp671 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc()
976 SUnit *SU = getSUnit(&MI); in dumpScheduleTraceTopDown()
994 SUnit *SU = getSUnit(&MI); in dumpScheduleTraceTopDown()
1058 SUnit *SU = getSUnit(&MI); in dumpScheduleTraceBottomUp()
1076 SUnit *SU = getSUnit(&MI); in dumpScheduleTraceBottomUp()
1138 if (SUnit *SU = getSUnit(&MI)) in dumpSchedule()
1869 if (Succ.getSUnit() == SUb) in clusterNeighboringMemOps()
1883 if (Pred.getSUnit() == SUa) in clusterNeighboringMemOps()
1944 (Pred.getSUnit() && Pred.getSUnit()->getInstr()->mayStore()))) && in groupMemOps()
2127 if (Succ.getSUnit() == GlobalSU) in constrainLocalCopy()
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H A DScheduleDAGInstrs.cpp1222 if (Topo.IsReachable(PredDep.getSUnit(), SuccSU)) in addEdge()
1224 Topo.AddPredQueued(SuccSU, PredDep.getSUnit()); in addEdge()
1300 unsigned PredNum = PredDep.getSUnit()->NodeNum; in visitPostorderNode()
1328 += R.DFSNodeData[PredDep.getSUnit()->NodeNum].InstrCount; in visitPostorderEdge()
1334 ConnectionPairs.emplace_back(PredDep.getSUnit(), Succ); in visitCrossEdge()
1381 const SUnit *PredSU = PredDep.getSUnit(); in joinPredSubtree()
1457 !SuccDep.getSUnit()->isBoundaryNode()) in hasDataSucc()
1484 || PredDep.getSUnit()->isBoundaryNode()) { in compute()
1488 if (Impl.isVisited(PredDep.getSUnit())) { in compute()
1492 Impl.visitPreorder(PredDep.getSUnit()); in compute()
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H A DAggressiveAntiDepBreaker.cpp275 const SUnit *PredSU = Pred.getSUnit(); in CriticalPathStep()
288 return (Next) ? Next->getSUnit() : nullptr; in CriticalPathStep()
823 SUnit *NextSU = Edge->getSUnit(); in BreakAntiDependencies()
866 if (Pred.getSUnit() == NextSU ? (Pred.getKind() != SDep::Anti || in BreakAntiDependencies()
875 if ((Pred.getSUnit() == NextSU) && (Pred.getKind() != SDep::Anti) && in BreakAntiDependencies()
880 } else if ((Pred.getSUnit() != NextSU) && in BreakAntiDependencies()
H A DCriticalAntiDepBreaker.cpp145 const SUnit *PredSU = P.getSUnit(); in CriticalPathStep()
555 const SUnit *NextSU = Edge->getSUnit(); in BreakAntiDependencies()
578 if (P.getSUnit() == NextSU in BreakAntiDependencies()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNMinRegStrategy.cpp90 for (auto PDep : SDep.getSUnit()->Preds) { in getReadySuccessors()
91 auto PSU = PDep.getSUnit(); in getReadySuccessors()
180 if (S.getSUnit()->isBoundaryNode() || isScheduled(S.getSUnit()) || in bumpPredsPriority()
183 for (const auto &P : S.getSUnit()->Preds) { in bumpPredsPriority()
184 auto PSU = P.getSUnit(); in bumpPredsPriority()
196 if (!P.getSUnit()->isBoundaryNode() && !isScheduled(P.getSUnit()) && in bumpPredsPriority()
197 Set.insert(P.getSUnit()).second) in bumpPredsPriority()
198 Worklist.push_back(P.getSUnit()); in bumpPredsPriority()
215 auto SuccSU = S.getSUnit(); in releaseSuccessors()
H A DAMDGPUExportClustering.cpp70 SUnit *PredSU = Pred.getSUnit(); in buildCluster()
86 SUnit *PredSU = Pred.getSUnit(); in removeExportDependencies()
95 SUnit *ExportPredSU = ExportPred.getSUnit(); in removeExportDependencies()
130 removeExportDependencies(DAG, *Succ.getSUnit()); in apply()
H A DSIMachineScheduler.cpp435 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc()
445 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc()
466 SUnit *SuccSU = Succ.getSUnit(); in releaseSuccessors()
647 if (PredDep.getSUnit() == &FromSU && in hasDataDependencyPred()
802 SUnit *Pred = PredDep.getSUnit(); in colorComputeReservedDependencies()
844 SUnit *Succ = SuccDep.getSUnit(); in colorComputeReservedDependencies()
926 SUnit *Succ = SuccDep.getSUnit(); in colorEndsAccordingToDependencies()
996 SUnit *Succ = SuccDep.getSUnit(); in colorMergeConstantLoadsNextGroup()
1017 SUnit *Succ = SuccDep.getSUnit(); in colorMergeIfPossibleNextGroup()
1214 SUnit *Pred = PredDep.getSUnit(); in createBlocksForVariant()
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H A DAMDGPUIGroupLP.cpp260 for (auto &SP : S.getSUnit()->Preds) in resetEdges()
261 if (SP.getSUnit() == &SU) in resetEdges()
262 S.getSUnit()->removePred(SP); in resetEdges()
524 Succ->Preds, [&Pred](SDep &P) { return P.getSUnit() == Pred; }); in removeEdges()
955 SUnit *SuccUnit = Succ.getSUnit(); in apply()
971 return ThisSucc.getSUnit() == Elt; in apply()
1077 if (Pred.getSUnit()->getInstr()->getOpcode() == in apply()
1079 Cache->push_back(Pred.getSUnit()); in apply()
1139 if (Pred.getSUnit()->getInstr()->getOpcode() == in applyIGLPStrategy()
1172 for (auto &Succ : Pred.getSUnit()->Succs) { in applyIGLPStrategy()
[all …]
H A DGCNILPSched.cpp66 SUnit *PredSU = Pred.getSUnit(); in CalcNodeSethiUllmanNumber()
110 unsigned Height = Succ.getSUnit()->getHeight(); in closestSucc()
277 auto PredSU = PredEdge.getSUnit(); in releasePredecessors()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonHazardRecognizer.cpp150 S.getSUnit()->NumPredsLeft == 1) { in EmitInstruction()
151 UsesDotCur = S.getSUnit(); in EmitInstruction()
165 TII->mayBeNewStore(*S.getSUnit()->getInstr()) && in EmitInstruction()
166 Resources->canReserveResources(*S.getSUnit()->getInstr())) { in EmitInstruction()
167 PrefVectorStoreNew = S.getSUnit(); in EmitInstruction()
H A DHexagonSubtarget.cpp277 MachineInstr &MI2 = *SI.getSUnit()->getInstr(); in apply()
284 for (SDep &PI : SI.getSUnit()->Preds) { in apply()
288 SI.getSUnit()->setDepthDirty(); in apply()
560 if (!I.isAssignedRegDep() || I.getSUnit() != Dst) in restoreLatency()
609 if (!I.isAssignedRegDep() || I.getSUnit() != Dst) in changeLatency()
626 !I.getSUnit()->getInstr()->isPseudo()) in getZeroLatency()
627 return I.getSUnit(); in getZeroLatency()
704 if (ExclSrc.count(I.getSUnit()) == 0 && in isBestZeroLatency()
706 changeLatency(I.getSUnit(), DstBest, 0); in isBestZeroLatency()
712 if (ExclDst.count(I.getSUnit()) == 0 && in isBestZeroLatency()
[all …]
H A DHexagonVLIWPacketizer.cpp937 if (Dep.getSUnit() == PacketSUDep && Dep.getKind() == SDep::Anti && in restrictingDepExistInPacket()
1005 if (Dep.getSUnit() == SU && Dep.getKind() == SDep::Data && in arePredicatesComplements()
1413 if (SUJ->Succs[i].getSUnit() != SUI) in isLegalToPacketizeTogether()
1921 if (Pred.getSUnit() == SUJ) in calcStall()
1932 if (Pred.getSUnit() == SUJ && Pred.getLatency() > 1) in calcStall()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp233 Topo.AddPred(SU, D.getSUnit()); in AddPred()
241 Topo.RemovePred(SU, D.getSUnit()); in RemovePred()
1090 SUnit *SuccDep = D.getSUnit(); in TryUnfoldSU()
1101 SUnit *SuccDep = D.getSUnit(); in TryUnfoldSU()
1198 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors()
1237 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs()
2100 SUnit *PredSU = Pred.getSUnit(); in HighRegPressure()
2149 SUnit *PredSU = Pred.getSUnit(); in RegPressureDiff()
2192 SUnit *PredSU = Pred.getSUnit(); in scheduledNode()
2274 SUnit *PredSU = Pred.getSUnit(); in unscheduledNode()
[all …]
H A DScheduleDAGFast.cpp136 SUnit *PredSU = PredEdge->getSUnit(); in ReleasePred()
167 LiveRegDefs[Pred.getReg()] = Pred.getSUnit(); in ReleasePredecessors()
190 if (LiveRegCycles[Succ.getReg()] == Succ.getSUnit()->getHeight()) { in ScheduleNodeBottomUp()
281 else if (Pred.getSUnit()->getNode() && in CopyAndMoveSuccessors()
282 Pred.getSUnit()->getNode()->isOperandOf(LoadNode)) in CopyAndMoveSuccessors()
294 if (ChainPred.getSUnit()) { in CopyAndMoveSuccessors()
310 SUnit *SuccDep = D.getSUnit(); in CopyAndMoveSuccessors()
317 SUnit *SuccDep = D.getSUnit(); in CopyAndMoveSuccessors()
354 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors()
390 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs()
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H A DResourcePriorityQueue.cpp73 SUnit *PredSU = Pred.getSUnit(); in numberRCValPredInSU()
111 SUnit *SuccSU = Succ.getSUnit(); in numberRCValSuccInSU()
212 SUnit &PredSU = *Pred.getSUnit(); in getSingleUnscheduledPred()
229 if (getSingleUnscheduledPred(Succ.getSUnit()) == SU) in push()
273 if (Succ.getSUnit() == SU) in isResourceAvailable()
498 if (Pred.isCtrl() || (Pred.getSUnit()->NumRegDefsLeft == 0)) in scheduledNode()
500 --Pred.getSUnit()->NumRegDefsLeft; in scheduledNode()
513 adjustPriorityOfUnscheduledPreds(Succ.getSUnit()); in scheduledNode()
H A DScheduleDAGVLIW.cpp110 SUnit *SuccSU = D.getSUnit(); in releaseSucc()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.cpp39 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isLoadAfterStore()
47 if (SU->Preds[i].getSUnit() == CurGroup[j]) in isLoadAfterStore()
65 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isBCTRAfterSet()
73 if (SU->Preds[i].getSUnit() == CurGroup[j]) in isBCTRAfterSet()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h152 SUnit *getSUnit() const;
433 if (Pred.getSUnit() == N) in isPred()
441 if (Succ.getSUnit() == N) in isSucc()
480 inline SUnit *SDep::getSUnit() const { return Dep.getPointer(); } in getSUnit() function
644 return Node->Preds[Operand].getSUnit();
H A DScheduleDAGInstrs.h288 SUnit *getSUnit(MachineInstr *MI) const;
392 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit() function
H A DMachinePipeliner.h255 return Source->getInstr()->isPHI() || Dep.getSUnit()->getInstr()->isPHI(); in isBackedge()
342 auto SuccSUnit = Succ.getSUnit(); in NodeSet()

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