| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 144 return RBI.constrainGenericRegister(DstReg, *RC, *MRI); in selectCOPY() 205 RBI.constrainGenericRegister(MO.getReg(), *RC, *MRI); in selectCOPY() 245 return RBI.constrainGenericRegister(DefReg, *DefRC, *MRI); in selectPHI() 413 if (!RBI.constrainGenericRegister(DstReg, RC, *MRI)) in selectG_ADD_SUB() 576 if (!RBI.constrainGenericRegister(DstReg, *DstRC, *MRI)) in selectG_MERGE_VALUES() 701 return RBI.constrainGenericRegister(Dst, RC, *MRI) && in selectG_BUILD_VECTOR() 702 RBI.constrainGenericRegister(Src0, RC, *MRI); in selectG_BUILD_VECTOR() 1536 !RBI.constrainGenericRegister(DstReg, *RC, *MRI)) in selectReturnAddress() 1714 if (!RBI.constrainGenericRegister(BaseOffset, in selectDSGWSIntrinsic() 2945 return RBI.constrainGenericRegister( in selectG_GLOBAL_VALUE() [all …]
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| H A D | AMDGPURegisterBankInfo.cpp | 740 constrainGenericRegister(SrcPart, AMDGPU::VGPR_32RegClass, MRI); in buildReadFirstLane() 1851 return constrainGenericRegister(DstReg, AMDGPU::VGPR_32RegClass, MRI) && in buildVCopy() 1852 constrainGenericRegister(SrcReg, AMDGPU::SReg_32RegClass, MRI); in buildVCopy() 1871 return constrainGenericRegister(SrcReg, AMDGPU::SReg_64RegClass, MRI) && in buildVCopy() 1872 constrainGenericRegister(DstReg, AMDGPU::VReg_64RegClass, MRI); in buildVCopy()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 263 RBI.constrainGenericRegister(Reg, *RC, MRI); in selectDebugInstr() 337 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy() 745 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTurnIntoCOPY() 746 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTurnIntoCOPY() 808 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTruncOrPtrToInt() 809 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTruncOrPtrToInt() 918 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectAnyext() 919 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectAnyext() 1033 RBI.constrainGenericRegister( in selectFCmp() 1272 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in emitExtractSubreg() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 984 RBI.constrainGenericRegister(Reg, *RC, MRI); in selectDebugInstr() 2950 RBI.constrainGenericRegister(Copy, *RC, MRI); in select() 3502 RBI.constrainGenericRegister(DstReg, *DstRC, MRI); in select() 3878 RBI.constrainGenericRegister(DstReg, *SrcRC, MRI); in selectVectorICmp() 3933 RBI.constrainGenericRegister(DstReg, *RC, MRI); in emitNarrowVector() 4071 RBI.constrainGenericRegister(*DstReg, *DstRC, MRI); in emitExtractVectorElt() 4091 RBI.constrainGenericRegister(*DstReg, *DstRC, MRI); in emitExtractVectorElt() 4277 RBI.constrainGenericRegister(CopyTo, *RC, MRI); in selectUnmergeValues() 5849 RBI.constrainGenericRegister( in emitConstantVector() 5920 return RBI.constrainGenericRegister(Dst, *DstRC, MRI); in tryOptBuildVecToSubregToReg() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 531 return RBI.constrainGenericRegister(DefReg, *DefRC, MRI); in select() 876 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy() 897 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectImplicitDef() 911 RBI.constrainGenericRegister(DstReg, RISCV::GPRRegClass, MRI); in materializeImm()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 666 constrainGenericRegister(Register Reg, const TargetRegisterClass &RC,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 112 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy() 436 return RBI.constrainGenericRegister(DestReg, *DefRC, MRI); in select()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 223 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy() 1147 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in select()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterBankInfo.cpp | 134 const TargetRegisterClass *RegisterBankInfo::constrainGenericRegister( in constrainGenericRegister() function in RegisterBankInfo
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 145 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 48 if (!RBI.constrainGenericRegister(Reg, RegClass, MRI)) in constrainRegToClass()
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