Searched refs:buildUndef (Results 1 – 11 of 11) sorted by relevance
654 B.buildUndef(R); in lowerFormalArguments()832 MIRBuilder.buildUndef(InputReg); in passSpecialInputs()837 MIRBuilder.buildUndef(InputReg); in passSpecialInputs()925 MIRBuilder.buildUndef(InputReg); in passSpecialInputs()
2320 B.buildUndef(Dst); in legalizeAddrSpaceCast()2649 B.buildUndef(Dst); in legalizeExtractVectorElt()2710 B.buildUndef(Dst); in legalizeInsertVectorElt()2880 B.buildUndef(DstReg); in legalizeGlobalValue()4231 B.buildUndef(DstReg); in loadInputValue()4274 B.buildUndef(DstReg); in legalizeWorkitemIDIntrinsic()5537 PackedRegs.resize(2, B.buildUndef(S32).getReg(0)); in handleD16VData()5547 PackedRegs.resize(6, B.buildUndef(S16).getReg(0)); in handleD16VData()5558 PackedRegs.resize(4, B.buildUndef(S32).getReg(0)); in handleD16VData()6157 B.buildUndef(MI.getOperand(0)); in legalizeImageIntrinsic()[all …]
1918 B.buildUndef(Hi32Reg); in extendLow32IntoHigh32()
259 buildUndef(Op0Ty.isVector() ? Op0Ty.getElementType() : Op0Ty).getReg(0); in buildPadVectorWithUndefElements()619 MachineInstrBuilder MachineIRBuilder::buildUndef(const DstOp &Res) { in buildUndef() function in MachineIRBuilder733 auto UndefVec = buildUndef(DstTy); in buildShuffleSplat()
274 PadReg = MIRBuilder.buildUndef(GCDTy).getReg(0); in buildLCMMergePieces()319 AllPadReg = MIRBuilder.buildUndef(NarrowTy).getReg(0); in buildLCMMergePieces()1214 DstRegs.push_back(MIRBuilder.buildUndef(NarrowTy).getReg(0)); in narrowScalar()1873 Register UndefReg = MIRBuilder.buildUndef(GCDTy).getReg(0); in widenScalarMergeValues()4361 MIRBuilder.buildUndef(DstReg); in fewerElementsVectorExtractInsertVectorElt()4759 SVOps.push_back(MIRBuilder.buildUndef(EltTy).getReg(0)); in fewerElementsVectorShuffle()4778 Output = MIRBuilder.buildUndef(NarrowTy).getReg(0); in fewerElementsVectorShuffle()4783 ? MIRBuilder.buildUndef(NarrowTy).getReg(0) in fewerElementsVectorShuffle()5300 Elts.push_back(MIRBuilder.buildUndef(MoreTy.getScalarType())); in moreElementsVector()5376 auto Undef = MIRBuilder.buildUndef(SrcTy); in equalizeVectorShuffleLengths()[all …]
260 Undef = Builder.buildUndef(OpType.getScalarType()); in matchCombineConcatVectors()293 Builder.buildUndef(NewDstReg); in applyCombineConcatVectors()374 UndefReg = Builder.buildUndef(SrcType).getReg(0); in matchCombineShuffleVector()424 Builder.buildUndef(DstReg); in applyShuffleToExtract()2066 B.buildUndef(DstReg); in matchCombineUnmergeUndef()2888 Builder.buildUndef(MI.getOperand(0)); in replaceInstWithUndef()2961 UndefReg = Builder.buildUndef(DstTy.getScalarType()).getReg(0); in applyCombineInsertVecElts()
2294 MIRBuilder.buildUndef(Undef); in translateKnownIntrinsic()2838 MIRBuilder.buildUndef(Undef); in translateLandingPad()3310 EntryBuilder->buildUndef(Reg); in translate()
591 Register Undef = B.buildUndef(SrcTy).getReg(0); in buildCopyToRegs()
763 auto Undef = B.buildUndef(SrcTy); in applyDupLane()
2006 auto Undef = MIRBuilder.buildUndef(VecTy); in legalizeFCopySign()
992 MachineInstrBuilder buildUndef(const DstOp &Res);