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Searched refs:Src1SubRC (Results 1 – 2 of 2) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp7735 const TargetRegisterClass *Src1SubRC = in splitScalarSMulU64() local
7737 if (RI.isSGPRClass(Src1SubRC)) in splitScalarSMulU64()
7738 Src1SubRC = RI.getEquivalentVGPRClass(Src1SubRC); in splitScalarSMulU64()
7745 buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in splitScalarSMulU64()
7749 buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC); in splitScalarSMulU64()
7844 const TargetRegisterClass *Src1SubRC = in splitScalarSMulPseudo() local
7846 if (RI.isSGPRClass(Src1SubRC)) in splitScalarSMulPseudo()
7847 Src1SubRC = RI.getEquivalentVGPRClass(Src1SubRC); in splitScalarSMulPseudo()
7854 buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in splitScalarSMulPseudo()
7909 const TargetRegisterClass *Src1SubRC = in splitScalar64BitBinaryOp() local
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H A DSIISelLowering.cpp4837 const TargetRegisterClass *Src1SubRC = in EmitInstrWithCustomInserter() local
4843 MI, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in EmitInstrWithCustomInserter()
4848 MI, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC); in EmitInstrWithCustomInserter()
5066 const TargetRegisterClass *Src1SubRC = in EmitInstrWithCustomInserter() local
5072 MI, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in EmitInstrWithCustomInserter()
5077 MI, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC); in EmitInstrWithCustomInserter()