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Searched refs:SPReg (Results 1 – 25 of 32) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFrameLowering.cpp188 Register SPReg = LoongArch::R3; in emitPrologue() local
216 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup); in emitPrologue()
265 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount, in emitPrologue()
276 .addReg(SPReg) in emitPrologue()
298 SPReg) in emitPrologue()
299 .addReg(SPReg) in emitPrologue()
311 .addReg(SPReg) in emitPrologue()
324 Register SPReg = LoongArch::R3; in emitEpilogue() local
355 adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount, in emitEpilogue()
361 adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy); in emitEpilogue()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYFrameLowering.cpp89 Register SPReg = CSKY::R14; in emitPrologue() local
117 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -(static_cast<int64_t>(ActualSize)), in emitPrologue()
152 .addReg(SPReg) in emitPrologue()
162 adjustReg(MBB, MBBI, DL, SPReg, SPReg, in emitPrologue()
174 .addReg(SPReg) in emitPrologue()
183 .addReg(SPReg) in emitPrologue()
212 adjustReg(MBB, MBBI, DL, SPReg, SPReg, in emitPrologue()
229 Register SPReg = CSKY::R14; in emitEpilogue() local
266 adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, (StackSize - ActualSize), in emitEpilogue()
270 adjustReg(MBB, MBBI, DL, SPReg, SPReg, ActualSize, in emitEpilogue()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.cpp284 unsigned SPReg = getSPReg(MF); in emitPrologue() local
286 SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue()
290 BuildMI(MBB, InsertPt, DL, TII->get(getOpcGlobGet(MF)), SPReg) in emitPrologue()
299 .addReg(SPReg); in emitPrologue()
307 .addReg(SPReg) in emitPrologue()
347 unsigned SPReg = 0; in emitEpilogue() local
351 SPReg = FI->getBasePointerVreg(); in emitEpilogue()
361 SPReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue()
362 BuildMI(MBB, InsertPt, DL, TII->get(getOpcAdd(MF)), SPReg) in emitEpilogue()
366 SPReg = SPFPReg; in emitEpilogue()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp811 .addReg(SPReg); in emitPrologue()
825 .addReg(SPReg); in emitPrologue()
830 .addReg(SPReg); in emitPrologue()
877 .addReg(SPReg); in emitPrologue()
893 .addReg(SPReg) in emitPrologue()
894 .addReg(SPReg); in emitPrologue()
983 .addReg(SPReg); in emitPrologue()
1163 .addReg(SPReg) in emitPrologue()
1164 .addReg(SPReg); in emitPrologue()
1406 BuildMI(&MBB, DL, CopyInst, TempReg).addReg(SPReg).addReg(SPReg); in inlineStackProbe()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.cpp411 RI.adjustReg(MBB, MBBI, DL, SPReg, SPReg, Offset, in adjustStackForRVV()
471 Register SPReg = getSPReg(STI); in emitPrologue() local
557 RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, in emitPrologue()
631 RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, in emitPrologue()
669 .addReg(SPReg) in emitPrologue()
677 .addReg(SPReg) in emitPrologue()
691 .addReg(SPReg) in emitPrologue()
773 RI->adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, in emitEpilogue()
792 RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackOffset::getFixed(StackSize), in emitEpilogue()
1268 Register SPReg = RISCV::X2; in eliminateCallFramePseudoInstr() local
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp136 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
137 assert((Mips::SP == SPReg) && "Unexpected stack-pointer register."); in sandboxLoadStoreStackChange()
138 emitMask(SPReg, LoadStoreStackMaskReg, STI); in sandboxLoadStoreStackChange()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86IndirectThunks.cpp253 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP; in populateThunk() local
254 addRegOffset(BuildMI(CallTarget, DebugLoc(), TII->get(MovOpc)), SPReg, false, in populateThunk()
H A DX86FrameLowering.h115 Register &SPReg) const;
117 Register &SPReg, int Adjustment) const;
H A DX86FrameLowering.cpp2242 Register SPReg; in getPSPSlotOffsetFromSP() local
2243 int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg, in getPSPSlotOffsetFromSP()
2246 assert(Offset >= 0 && SPReg == TRI->getStackRegister()); in getPSPSlotOffsetFromSP()
3545 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
3549 SPReg = X86::RSP; in adjustForHiPEPrologue()
3555 SPReg = X86::ESP; in adjustForHiPEPrologue()
3567 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg), SPReg, in adjustForHiPEPrologue()
3578 addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg), SPReg, in adjustForHiPEPrologue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp74 if (!SPReg) in getStackAddress()
75 SPReg = MIRBuilder.buildCopy(p0, Register(RISCV::X2)).getReg(0); in getStackAddress()
79 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
160 Register SPReg; member
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp83 auto SPReg = MIRBuilder.buildCopy(p0, StackReg).getReg(0); in getStackAddress() local
85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp97 auto SPReg = in getStackAddress() local
102 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp102 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); in getStackAddress() local
106 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp184 Register SPReg; member
211 if (!SPReg) { in getStackAddress()
215 SPReg = MIRBuilder.buildCopy(PtrTy, in getStackAddress()
221 SPReg = MIRBuilder.buildInstr(AMDGPU::G_AMDGPU_WAVE_ADDRESS, {PtrTy}, in getStackAddress()
228 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress()
H A DSIFrameLowering.cpp688 Register SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
689 assert(SPReg != AMDGPU::SP_REG); in emitEntryFunctionPrologue()
690 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), SPReg) in emitEntryFunctionPrologue()
1771 Register SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr() local
1776 auto Add = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_I32), SPReg) in eliminateCallFramePseudoInstr()
1777 .addReg(SPReg) in eliminateCallFramePseudoInstr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp264 if (!SPReg) in getStackAddress()
265 SPReg = MIRBuilder.buildCopy(p0, Register(AArch64::SP)).getReg(0); in getStackAddress()
269 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
340 Register SPReg; member
H A DAArch64LegalizerInfo.cpp2066 Register SPReg = in legalizeDynStackAlloc() local
2069 Helper.getDynStackAllocTargetPtr(SPReg, AllocSize, Alignment, PtrTy); in legalizeDynStackAlloc()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp237 auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP)); in getStackAddress() local
240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerHelper.h403 Register getDynStackAllocTargetPtr(Register SPReg, Register AllocSize,
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp1328 unsigned SPReg = Regs.getStackPointerRegister(); in emitEpilogue() local
1329 if (ZFI->getRestoreGPRRegs().LowGPR != SPReg) { in emitEpilogue()
1331 emitIncrement(MBB, MBBI, DL, SPReg, StackSize, ZII); in emitEpilogue()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1025 Register SPReg = getStackPointerRegisterToSaveRestore(); in LowerDYNAMIC_STACKALLOC() local
1028 SDValue StackPointer = DAG.getCopyFromReg(Chain, DL, SPReg, MVT::i32); in LowerDYNAMIC_STACKALLOC()
1048 SDValue CopyChain = DAG.getCopyToReg(Chain, DL, SPReg, Sub); in LowerDYNAMIC_STACKALLOC()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp3408 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); in LowerDYNAMIC_STACKALLOC() local
3409 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" in LowerDYNAMIC_STACKALLOC()
3412 SDValue SP = DAG.getCopyFromReg(Chain, DL, SPReg, VT); in LowerDYNAMIC_STACKALLOC()
3420 Chain = DAG.getCopyToReg(Chain, DL, SPReg, Result); // Output chain in LowerDYNAMIC_STACKALLOC()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp11829 int SPReg = tryParseRegister(); in parseDirectiveSetFP() local
11830 if (check(SPReg == -1, SPRegLoc, "stack pointer register expected") || in parseDirectiveSetFP()
11831 check(SPReg != ARM::SP && SPReg != UC.getFPReg(), SPRegLoc, in parseDirectiveSetFP()
11861 static_cast<unsigned>(SPReg), Offset); in parseDirectiveSetFP()
12148 int SPReg = tryParseRegister(); in parseDirectiveMovSP() local
12149 if (SPReg == -1) in parseDirectiveMovSP()
12151 if (SPReg == ARM::SP || SPReg == ARM::PC) in parseDirectiveMovSP()
12175 getTargetStreamer().emitMovSP(SPReg, Offset); in parseDirectiveMovSP()
12176 UC.saveFPReg(SPReg); in parseDirectiveMovSP()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2829 unsigned SPReg = SP::O6; in LowerDYNAMIC_STACKALLOC() local
2830 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); in LowerDYNAMIC_STACKALLOC()
2832 Chain = DAG.getCopyToReg(SP.getValue(1), dl, SPReg, NewSP); // Output chain in LowerDYNAMIC_STACKALLOC()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp1718 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); in ExpandDYNAMIC_STACKALLOC() local
1719 assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and" in ExpandDYNAMIC_STACKALLOC()
1733 SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); in ExpandDYNAMIC_STACKALLOC()
1746 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain in ExpandDYNAMIC_STACKALLOC()

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