649   Register SPReg       = isPPC64 ? PPC::X1  : PPC::R1;  in emitPrologue()  local
811         .addReg(SPReg);  in emitPrologue()
825         .addReg(SPReg);  in emitPrologue()
830         .addReg(SPReg);  in emitPrologue()
835         .addReg(SPReg);  in emitPrologue()
846         .addReg(SPReg);  in emitPrologue()
864           .addReg(SPReg);  in emitPrologue()
877       .addReg(SPReg);  in emitPrologue()
893       .addReg(SPReg)  in emitPrologue()
894       .addReg(SPReg);  in emitPrologue()
930           .addReg(SPReg);  in emitPrologue()
937             .addReg(SPReg)  in emitPrologue()
942             .addReg(SPReg)  in emitPrologue()
958       BuildMI(MBB, MBBI, dl, StoreUpdtIdxInst, SPReg)  in emitPrologue()
959           .addReg(SPReg, RegState::Kill)  in emitPrologue()
960           .addReg(SPReg)  in emitPrologue()
963       BuildMI(MBB, StackUpdateLoc, dl, StoreUpdtInst, SPReg)  in emitPrologue()
964           .addReg(SPReg)  in emitPrologue()
966           .addReg(SPReg);  in emitPrologue()
969       BuildMI(MBB, MBBI, dl, StoreUpdtIdxInst, SPReg)  in emitPrologue()
970           .addReg(SPReg, RegState::Kill)  in emitPrologue()
971           .addReg(SPReg)  in emitPrologue()
983       .addReg(SPReg);  in emitPrologue()
1001         .addReg(SPReg);  in emitPrologue()
1081           .addReg(SPReg);  in emitPrologue()
1086           .addReg(SPReg);  in emitPrologue()
1091           .addReg(SPReg);  in emitPrologue()
1093           .addReg(SPReg)  in emitPrologue()
1163       .addReg(SPReg)  in emitPrologue()
1164       .addReg(SPReg);  in emitPrologue()
1258   Register SPReg = isPPC64 ? PPC::X1 : PPC::R1;  in inlineStackProbe()  local
1309       BuildMI(MBB, MBBI, DL, TII.get(isPPC64 ? PPC::STDU : PPC::STWU), SPReg)  in inlineStackProbe()
1312           .addReg(SPReg);  in inlineStackProbe()
1314       BuildMI(MBB, MBBI, DL, TII.get(isPPC64 ? PPC::STDUX : PPC::STWUX), SPReg)  in inlineStackProbe()
1316           .addReg(SPReg)  in inlineStackProbe()
1403           .addReg(SPReg)  in inlineStackProbe()
1406         BuildMI(&MBB, DL, CopyInst, TempReg).addReg(SPReg).addReg(SPReg);  in inlineStackProbe()
1452           .addReg(SPReg)  in inlineStackProbe()
1457           .addReg(SPReg)  in inlineStackProbe()
1464         .addReg(SPReg);  in inlineStackProbe()
1475     BuildMI(*CurrentMBB, {MI}, DL, CopyInst, FPReg).addReg(SPReg).addReg(SPReg);  in inlineStackProbe()
1497         buildDefCFAReg(*CurrentMBB, {MI}, SPReg);  in inlineStackProbe()
1531         buildDefCFAReg(*ExitMBB, ExitMBB->begin(), SPReg);  in inlineStackProbe()
1576   Register SPReg      = isPPC64 ? PPC::X1  : PPC::R1;  in emitEpilogue()  local
1676   unsigned RBReg = SPReg;  in emitEpilogue()
1743         BuildMI(MBB, StackUpdateLoc, dl, AddImmInst, SPReg)  in emitEpilogue()
1744           .addReg(SPReg)  in emitEpilogue()
1769         .addReg(SPReg);  in emitEpilogue()
1785       .addReg(SPReg);  in emitEpilogue()
1796   if (MustSaveLR && RBReg == SPReg && isInt<16>(LROffset+SPAdd)) {  in emitEpilogue()
1804     assert(RBReg == SPReg && "Should be using SP as a base register");  in emitEpilogue()
1813     if (HasRedZone || RBReg == SPReg)  in emitEpilogue()
1816         .addReg(SPReg);  in emitEpilogue()
1835   if (RBReg != SPReg || SPAdd != 0) {  in emitEpilogue()
1839       BuildMI(MBB, MBBI, dl, OrInst, SPReg)  in emitEpilogue()
1843       BuildMI(MBB, MBBI, dl, AddImmInst, SPReg)  in emitEpilogue()
1857         .addReg(SPReg);  in emitEpilogue()
1879           .addReg(SPReg);  in emitEpilogue()
1895         BuildMI(MBB, MBBI, dl, AddImmInst, SPReg)  in emitEpilogue()
1896           .addReg(SPReg).addImm(CallerAllocatedAmt);  in emitEpilogue()
1904           .addReg(SPReg)  in emitEpilogue()