Searched refs:RegsToVisit (Results 1 – 2 of 2) sorted by relevance
3562 SmallVector<Register, 8> RegsToVisit; in findCandidatesForLoadOrCombine() local3585 RegsToVisit.push_back(OrLHS); in findCandidatesForLoadOrCombine()3589 RegsToVisit.push_back(OrRHS); in findCandidatesForLoadOrCombine()3594 if (RegsToVisit.empty() || RegsToVisit.size() % 2 != 0) in findCandidatesForLoadOrCombine()3596 return RegsToVisit; in findCandidatesForLoadOrCombine()3669 for (auto Reg : RegsToVisit) { in findLoadOffsetsForLoadOrCombine()3741 assert(Loads.size() == RegsToVisit.size() && in findLoadOffsetsForLoadOrCombine()3794 auto RegsToVisit = findCandidatesForLoadOrCombine(&MI); in matchLoadOrCombine() local3795 if (!RegsToVisit) in matchLoadOrCombine()3801 const unsigned NarrowMemSizeInBits = WideMemSizeInBits / RegsToVisit->size(); in matchLoadOrCombine()[all …]
857 const SmallVector<Register, 8> &RegsToVisit,