Lines Matching refs:RegsToVisit
3562 SmallVector<Register, 8> RegsToVisit; in findCandidatesForLoadOrCombine() local
3585 RegsToVisit.push_back(OrLHS); in findCandidatesForLoadOrCombine()
3589 RegsToVisit.push_back(OrRHS); in findCandidatesForLoadOrCombine()
3594 if (RegsToVisit.empty() || RegsToVisit.size() % 2 != 0) in findCandidatesForLoadOrCombine()
3596 return RegsToVisit; in findCandidatesForLoadOrCombine()
3637 const SmallVector<Register, 8> &RegsToVisit, const unsigned MemSizeInBits) { in findLoadOffsetsForLoadOrCombine() argument
3669 for (auto Reg : RegsToVisit) { in findLoadOffsetsForLoadOrCombine()
3741 assert(Loads.size() == RegsToVisit.size() && in findLoadOffsetsForLoadOrCombine()
3794 auto RegsToVisit = findCandidatesForLoadOrCombine(&MI); in matchLoadOrCombine() local
3795 if (!RegsToVisit) in matchLoadOrCombine()
3801 const unsigned NarrowMemSizeInBits = WideMemSizeInBits / RegsToVisit->size(); in matchLoadOrCombine()
3816 MemOffset2Idx, *RegsToVisit, NarrowMemSizeInBits); in matchLoadOrCombine()